PIC16CE625-20/JW Microchip Technology, PIC16CE625-20/JW Datasheet - Page 26
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PIC16CE625-20/JW
Manufacturer Part Number
PIC16CE625-20/JW
Description
OTP 8-Bit CMOS MCU with EEPROM Data Memory
Manufacturer
Microchip Technology
Datasheet
1.PIC16CE625-20JW.pdf
(189 pages)
- Current page: 26 of 189
- Download datasheet (2Mb)
PIC16C9XX
4.2.2.4
This register contains the individual enable bits for the
peripheral interrupts.
FIGURE 4-6: PIE1 REGISTER (ADDRESS 8Ch)
DS30444E - page 26
bit7
bit 7:
bit 6:
bit 5-4: Unimplemented: Read as '0'
bit 3:
bit 2:
bit 1:
bit 0:
Note 1: Bit ADIE is reserved on the PIC16C923, always maintain this bit clear.
LCDIE
R/W-0
PIE1 REGISTER
LCDIE: LCD Interrupt Enable bit
1 = Enables the LCD interrupt
0 = Disables the LCD interrupt
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D interrupt
0 = Disables the A/D interrupt
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
ADIE
R/W-0
(1)
U-0
—
U-0
—
SSPIE
R/W-0
(1)
CCP1IE
R/W-0
TMR2IE
R/W-0
Note:
TMR1IE
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
R/W-0
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
1997 Microchip Technology Inc.
read as ‘0’
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