PIC17C42 Microchip Technology, PIC17C42 Datasheet - Page 75

• Manufacturer Part Number: PIC17C42
• Description: High-Performance 8-Bit CMOS EPROM/ROM Microcontroller
• Manufacturer: Microchip Technology

12.1.3
Two high speed pulse width modulation (PWM) outputs
are provided. The PWM1 output uses Timer1 as its
time-base, while PWM2 may be software configured to
use either Timer1 or Timer2 as the time-base. The
PWM outputs are on the RB2/PWM1 and RB3/PWM2
pins.
Each PWM output has a maximum resolution of
10-bits. At 10-bit resolution, the PWM output frequency
is 24.4 kHz (@ 25 MHz clock) and at 8-bit resolution the
PWM output frequency is 97.7 kHz. The duty cycle of
the output can vary from 0% to 100%.
Figure 12-5 shows a simplified block diagram of the
PWM module. The duty cycle register is double buff-
ered for glitch free operation. Figure 12-6 shows how a
glitch could occur if the duty cycle registers were not
double buffered.
The user needs to set the PWM1ON bit (TCON2<4>)
to enable the PWM1 output. When the PWM1ON bit is
set, the RB2/PWM1 pin is configured as PWM1 output
and forced as an output irrespective of the data direc-
tion bit (DDRB<2>). When the PWM1ON bit is clear,
the pin behaves as a port pin and its direction is con-
trolled by its data direction bit (DDRB<2>). Similarly,
the PWM2ON (TCON2<5>) bit controls the configura-
tion of the RB3/PWM2 pin.
FIGURE 12-6: PWM OUTPUT
1996 Microchip Technology Inc.
PWM
output
Note
USING PULSE WIDTH MODULATION
(PWM) OUTPUTS WITH TMR1 AND TMR2
In this example, PWM period = 50. Old duty cycle is 30. New duty cycle value is 10.
The dotted line shows PWM output if duty cycle registers were not double buffered.
If the new duty cycle is written after the timer has passed that value, then the PWM does
not reset at all during the current cycle causing a “glitch”.
Timer
interrupt
0
10
Write new
PWM value
20
30
40
0
Timer interrupt
new PWM value
transferred to slave
FIGURE 12-5: SIMPLIFIED PWM BLOCK
Note 1: 8-bit timer is concatenated with 2-bit internal Q clock
PWxDCH
(Slave)
Duty Cycle registers
Comparator
PRy
or 2 bits of the prescaler to create 10-bit time-base.
TMR2
Comparator
(Note 1)
DIAGRAM
Clear Timer,
PWMx pin and
Latch D.C.
Read
Write
PIC17C4X
PWxDCL<7:6>
R
S
Q
DS30412C-page 75
PWMxON
RCy/PWMx