PIC18LF13K22 Microchip Technology, PIC18LF13K22 Datasheet - Page 18

• Manufacturer Part Number: PIC18LF13K22
• Description: (PIC18F1xK22) Flash Microcontrollers
• Manufacturer: Microchip Technology

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PIC18F1XK22/LF1XK22
4.3
Data EEPROM is accessed one byte at a time via an
Address Pointer (register EEADR) and a data latch
(EEDATA). Data EEPROM is written by loading
EEADR with the desired memory location, EEDATA
with the data to be written and initiating a memory write
by appropriately configuring the EECON1 register. A
byte write automatically erases the location and writes
the new data (erase-before-write).
When using the EECON1 register to perform a data
EEPROM write, both the EEPGD and CFGS bits must
be cleared (EECON1<7:6> = 00). The WREN bit must
be set (EECON1<2> = 1) to enable writes of any sort
and this must be done prior to initiating a write
sequence. The write sequence is initiated by setting the
WR bit (EECON1<1> = 1).
The write begins on the falling edge of the 24th PGC
after the WR bit is set. It ends when the WR bit is
cleared by hardware.
After the programming sequence terminates, PGC
must be held low for the time specified by parameter
P10 to allow high-voltage discharge of the memory
array.
FIGURE 4-7:
DS41357A-page 18
PGC
PGD
Poll WR bit
Data EEPROM Programming
4-bit Command
1
0
2
0
3
0
4
PGD
0
PGC
P5
DATA EEPROM WRITE TIMING DIAGRAM
BSF EECON1, WR
1
4-bit Command
2
1
0
2
0
15 16
3
0
4
0
P5A
P5
MOVF EECON1, W, 0
2 NOP commands
1
Advance Information
2
PGD = Input
PGD = Input
15 16
P5A
P5A
4-bit Command
1
0
FIGURE 4-6:
2
0
3
0
4
0
Poll WR bit, Repeat until Clear
P5
MOVWF TABLAT
1
(see below)
No
2
P11A
15 16
PROGRAM DATA FLOW
Enable Write
Set Address
Start Write
Sequence
© 2008 Microchip Technology Inc.
Set Data
done?
WR bit
clear?
Start
Done
P5A
Yes
Yes
(see Figure 4-4)
PGD = Output
Shift Out Data
No
P10
16-bit Data
Payload
1
n
2
n