PIC18LF8720 Microchip Technology, PIC18LF8720 Datasheet - Page 77

• Manufacturer Part Number: PIC18LF8720
• Description: (PIC18LF6620/6520/8520/6620/8620/6720/8720) 64/80-Pin High-Performance / 64-Kbyte Enhanced Flash Microcontrollers
• Manufacturer: Microchip Technology

6.2.3
Figure 6-3 shows an example of 16-bit Byte Select
mode for PIC18F8X20 devices. This mode allows table
write operations to word-wide external memories with
byte selection capability. This generally includes both
word-wide Flash and SRAM devices.
During a TBLWT cycle, the TABLAT data is presented
on the upper and lower byte of the AD15:AD0 bus. The
WRH signal is strobed for each write cycle; the WRL
pin is not used. The BA0 or UB/LB signals are used to
select the byte to be written, based on the Least
Significant bit of the TBLPTR register.
FIGURE 6-3:
 2004 Microchip Technology Inc.
PIC18F8X20
Note 1: This signal only applies to table writes. See Section 5.1 “Table Reads and Table Writes”.
16-BIT BYTE SELECT MODE
AD<15:8>
A<19:16>
AD<7:0>
PIC18F6520/8520/6620/8620/6720/8720
WRH
WRL
ALE
BA0
OE
I/O
UB
LB
16-BIT BYTE SELECT MODE EXAMPLE
373
373
A<20:1>
A<20:1>
138
Flash and SRAM devices use different control signal
combinations to implement Byte Select mode. JEDEC
standard Flash memories require that a controller I/O
port pin be connected to the memory’s BYTE/WORD
pin to provide the select signal. They also use the BA0
signal from the controller as a byte address. JEDEC
standard static RAM memories, on the other hand, use
the UB or LB signals to select the byte.
A<x:1>
A<x:1>
CE
UB
A0
CE
BYTE/WORD
LB
OE
SRAM Memory
Address Bus
Data Bus
Control Lines
Flash Memory
WR
JEDEC Word
JEDEC Word
OE WR
(1)
D<15:0>
D<15:0>
DS39609B-page 75
(1)
D<15:0>
D<15:0>