PIC24H Microchip Technology, PIC24H Datasheet - Page 43
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PIC24H
Manufacturer Part Number
PIC24H
Description
Flash Programming Specification
Manufacturer
Microchip Technology
Datasheet
1.PIC24H.pdf
(80 pages)
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TABLE 3-3:
© 2007 Microchip Technology Inc.
POSCMD<1:0>
FNOSC<2:0>
FCKSM<1:0>
dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
OSCIOFNC
GSS<1:0>
IOL1WAY
WDTPRE
FWDTEN
Bit Field
WINDIS
GWRP
TEMP
IESO
dsPIC33F/PIC24H CONFIGURATION BITS DESCRIPTION (CONTINUED)
FOSCSEL
FOSCSEL
FOSCSEL
Register
FWDT
FWDT
FWDT
FOSC
FOSC
FOSC
FOSC
FGS
FGS
General Segment Code-Protect bit
11 = Code protection is disabled
10 = Standard security code protection is enabled
0x = Reserved in dsPIC33FJ12GP201/202, dsPIC33FJ12MC201/202
and PIC24HJ12GP201/202. In all other devices, high security code
protection is enabled.
General Segment Write-Protect bit
1 = General Segment program memory is not write-protected
0 = General Segment program memory is write-protected
Two-speed Oscillator Start-Up Enable bit
1 = Start up device with FRC, then automatically switch to the
user-selected oscillator source when ready
0 = Start up device with user-selected oscillator source
Temperature Protection Enable bit
1 = Temperature protection disabled
0 = Temperature protection enabled
Initial Oscillator Source Selection bits
111 = Internal Fast RC (FRC) oscillator
110 = Reserved
101 = LPRC oscillator
100 = Secondary (LP) oscillator
011 = Primary (XT, HS, EC) oscillator with PLL
010 = Primary (XT, HS, EC) oscillator
001 = Internal Fast RC (FRC) oscillator with PLL
000 = Reserved
Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Peripheral Pin Select Configuration
1 = Allow only one reconfiguration
0 = Allow multiple reconfigurations
[Note: This bit is only present in the dsPIC33FJ12GP201/202,
dsPIC33FJ12MC201/202 and PIC24HJ12GP201/202 devices.]
OSC2 Pin Function bit (except in XT and HS modes)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
Primary Oscillator Mode Select bits
11 = Primary oscillator disabled
10 = HS crystal oscillator mode
01 = XT crystal oscillator mode
00 = EC (external clock) mode
Watchdog Enable bit
1 = Watchdog always enabled (LPRC oscillator cannot be disabled.
Clearing the SWDTEN bit in the RCON register will have no effect)
0 = Watchdog enabled/disabled by user software (LPRC can be
disabled by clearing the SWDTEN bit in the RCON register)
Watchdog Timer Window Enable bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode
Watchdog Timer Prescaler bit
1 = 1:128
0 = 1:32
Preliminary
Description
www.DataSheet4U.com
DS70152D-page 43