PC-414A ETC, PC-414A Datasheet - Page 3

• Manufacturer Part Number: PC-414A
• Description: Last Time Buy Notice Board Products
• Manufacturer: ETC

DATEL, Inc., Mansfield, MA 02048 (USA)
FEATURES
Offering very high system speed, the PC-414 is a multi-channel
analog input board for ISA compatible computers. Input
bandwidth is available up to 5 MHz and may be sampled at up
to 10 MHz. A common motherboard is used, with the analog
section contained in a pluggable 2” by 4” module. This allows
for a family of several different Sample/Hold - A/D Converter
speed and resolution options by exchanging analog modules.
The analog input ranges of the A/D converter are selectable
as unipolar 0 to +10 V, or bipolar ±5 V, or ±10 V depending on
the model. Model PC-414E offers 16 single-ended or 8
differential high speed channels.
Models PC-414F, G, J, K, L, M, and P include a simultaneous
sampling section. This function acquires signals on parallel
channels at the same time. This prevents phase errors and
skewing of multichannel correlated signals. Applications
include high speed cross-channel computation, beam-former
coherency for sonar or acoustics, telemetry, multiple carrier
demodulation, and highly concurrent system testing.
Analog
A/D Start Clock
Inputs
Trigger In
Up to 10 MHz A/D sample rate
Very low harmonic distortion
Analog input comparator trigger
Choice of 12, 14, or 16-bit A/D resolution
Optional 2 to 8-channel simultaneous sampling
On-board FIFO memory up to 16,384 samples
Ideal for FFT’s, DSP, or array processor “front ends”
Non-bus burst parallel port for seamless recording
D/A Out
®
External
Trigger
8MHz
82C54 Programmable
Interval Timer
EOC
M
U
X
Pluggable Analog Section
Channel Address Sequencer
Tel: [phone] Fax: [phone]
®
A/D
A/D
Trigger
Comparator
Interrupt
Request
Figure 1. Functional Block Diagram
Trigger Control
C
T
L
Analog Trigger
ACQ
LabVIEW
DMA
T/C
Now with
NEW
Half
Full
Empty Half
79
SSH Control
D/A Converter
ISA BUS
®
A/D data passes to an on-board First-In, First-Out (FIFO) data
memory and then to the host computer bus interface under
software control. The FIFO acts to uncouple the precise
timing of the A/D section from the block-oriented data
transfers on the bus. The design can continuously collect
analog data with non-stop converter triggering while data is
simultaneously read from the FIFO. This allows the collection
of “seamless” wide-bandwidth signals of millions of samples or
greater. Functions such as FFT sampling cannot tolerate lost
samples without increases in “arithmetic” noise during
computation processing.
Data can be transferred to mass storage peripherals such as
disk or magnetic tape. Applications include long-baseline
studies in astrophysics, component life testing, and
anomalous pattern search.
VI's
Base Address
High-Speed Analog Input Board
Memory
Request
FIFO
DMA
Select
Full
Reset
Interface
Email: [e-mail]
I/O Bus
for ISA Computers
Digital
I/O
Power Converter
Registers
DC/DC
D/A Output
Ready Output
Acknowledge Input
External Enable Input
FIFO Flags
Internet: www.datel.com
PC-414
8 out,
8 in
Parallel Outport or
DSP COMM Port
+5V