HA1-5320883 Intersil Corporation, HA1-5320883 Datasheet - Page 12

• Manufacturer Part Number: HA1-5320883
• Description: High Speed Precision Sample and Hold Amplifier
• Manufacturer: Intersil Corporation

DESIGN INFORMATION
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as applica-
tion and design information only. No guarantee is implied.
Glossary of Terms
Acquisition Time
The time required following a “sample” command, for the
output to reach its final value within 0.1% or 0.01%. This is
the minimum sample time required to obtain a given accu-
racy, and includes switch delay time, slewing time and set-
tling time.
Charge Transfer
The small charge transferred to the holding capacitor from
the inter-electrode capacitance of the switch when the unit is
switched to the HOLD mode. Charge transfer is directly pro-
portional to sample-to-hold offset pedestal error, where:
Aperture Time
The time required for the sample-and-hold switch to open,
independent of delays through the switch driver and input
amplifier circuitry. The switch opening time is the interval
between the conditions of 10% open and 90% open.
Hold Step Error
Hold Step Error is the output error due to Charge Transfer
(see above). It may be calculated from Charge Transfer,
using the following relationship:
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
Input Voltage Range
Offset Voltage Drift
Gain Bandwidth Product (C
Gain Bandwidth Product (C
Full Power Bandwidth
Output Resistance (Hold Mode)
0.1% Acquisition Time
0.01% Acquisition Time
Effective Aperture Delay Time
Aperture Uncertainty
0.01% Hold Mode Settling Time
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Charge Transfer (pC) = C
HOLD STEP (V) =
PARAMETER
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
H
H
= 1000pF)
= 100pF)
HOLD CAPACITANCE (pF)
CHARGE TRANSFER (pC)
H
(pF) x Offset Error (V)
TYPICAL PERFORMANCE CHARACTERISTICS
Av = +1, V
Av = +1, V
V
V
V
O
O
O
= 20V
= 10V Step, R
= 10V Step, R
(Continued)
P-P
O
O
= 200mV
= 200mV
, R
CONDITIONS
L
= 2K, C
HA-5320
L
L
= 2K, C
= 2K, C
P-P
P-P
7-14
, R
, R
L
See Performance Curves.
Effective Aperture Delay Time (EADT)
The difference between propagation time from the analog
input to S/H switch, and digital delay time between the Hold
command and opening of the switch.
EADT may be positive, negative or zero. If zero, the S/H
amplifier will output a voltage equal to V
Hold command was received. For negative EADT, the output
in Hold (exclusive of pedestal and droop errors) will
correspond to a value of V
command.
Aperture Uncertainty
The range of variation in Effective Aperture Delay Time.
Aperture
Uncertainty, Aperture Time Jitter, etc.) sets a limit on the
accuracy with which a waveform can be reconstructed from
sample data.
Drift Current
The net leakage current from the hold capacitor during the
hold mode. Drift current can be calculated from the droop
rate using the formula:
= 50pF
L
L
L
L
= 50pF
= 50pF
= 2K, C
= 2K, C
L
L
I
D
= 50pF
= 50pF
Uncertainty
(pA) = C
H
TEMPERATURE
(pF) x
+25
+25
+25
+25
+25
+25
+25
+25
+25
(also
Full
Full
IN
o
o
o
o
o
o
o
o
o
that occurred before the Hold
C
C
C
C
C
C
C
C
C
Spec Number
V
T
called
(V/s)
IN
TYP
0.18
600
165
1.0
0.8
1.0
-25
0.3
Aperture
at the instant the
10
5
2
511096-883
UNITS
MHz
MHz
kHz
V/
ns
ns
ns
V
s
s
Delay
o
C