APL5915 Anpec Electronics Corporation, APL5915 Datasheet - Page 12

• Manufacturer Part Number: APL5915
• Description: 0.8v Reference Ultra Low Dropout 0.2v@1.5a Linear Regulator
• Manufacturer: Anpec Electronics Corporation

APL5915
Functional Pin Description
GND (Pin 1)
Ground pin of the circuitry. All voltage levels are
measured with respect to this pin.
FB (Pin 2)
Connecting this pin to an external resistor divider
receives the feedback voltage of the regulator. The
output voltage set by the resistor divider is determined
by:
where R1 is connected from VOUT to FB with Kelvin
sensing and R2 is connected from FB to GND. A
bypass capacitor may be connected with R1 in parallel
to improve load transient response.
VOUT (Pin 3, 4)
Output of the regulator. Please connect Pin 3 and 4
together using wide tracks. It is necessary to connect
a output capacitor with this pin for closed-loop
compensation and improve transient responses.
VIN (Pin 5) and Exposed Pad
Main supply input pins for power conversions. The
Exposed Pad provides a very low impedance input
path for the main supply voltage. Please tie the Ex-
Function Description
Power-On-Reset
A Power-On-Reset (POR) circuit monitors both input
voltages at VCNTL and VIN pins to prevent wrong logic
controls. The POR function initiates a soft-start process
after the two supply voltages exceed their rising POR
threshold voltages during powering on. The POR func-
tion also pulls low the POK pin regardless the output
voltage when the VCNTL voltage falls below its falling
POR threshold.
Copyright
Rev. A.3 - Apr., 2008
V
OUT
ANPEC Electronics Corp.
0.8
1
R2
R1
(V)
12
posed Pad and VIN Pin (Pin 8) together to reduce the
dropout voltage. The voltage at this pins is monitored
for Power-On-Reset purpose.
VCNTL (Pin 6)
Power input pin of the control circuitry. Connecting
this pin to a +5V (recommended) supply voltage
provides the bias for the control circuitry. The voltage
at this pin is monitored for Power-On-Reset purpose.
POK (Pin 7)
Power-OK signal output pin. This pin is an open-drain
output used to indicate status of output voltage by
sensing FB voltage. This pin is pulled low when the
rising FB voltage is not above the V
the falling FB voltage is below the V
indicating the output is not OK.
EN (Pin 8)
Enable control pin. Pulling and holding this pin below
0.3V shuts down the output. When re-enabled, the IC
undergoes a new soft-start cycle. When leave this pin
open, an internal current source 10 A pulls this pin up
to VCNTL voltage, enabling the regulator.
Internal Soft-Start
An internal soft-start function controls rising rate of
the output voltage to limit the current surge at start-
up. The typical soft-start interval is about 2ms.
Output Voltage Regulation
An error amplifier works with a temperature-compensated
0.8V reference and an output NMOS regulates out-
put to the preset voltage. The error amplifier is de-
signed with high bandwidth and DC gain
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POK
PNOK
threshold or
threshold,