S-1122 Seiko Instruments, S-1122 Datasheet - Page 12

• Manufacturer Part Number: S-1122
• Description: 9S-1112 / S-1122) HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR
• Manufacturer: Seiko Instruments

www.datasheet4u.com
12
HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1112/1122 Series
Explanation of Terms
1. Low dropout voltage regulator
2. Low ESR
3. Output voltage (V
4.
5. Load regulation ( ∆ V
6. Dropout voltage (V
Line
The low dropout voltage regulator is a voltage regulator whose dropout voltage is low due to its built-in
low on-resistance transistor.
A capacitor whose ESR (Equivalent Series Resistance) is low. The S-1112/1122 Series enables use of
a low ESR capacitor, such as a ceramic capacitor, for the output-side capacitor C
ESR is 10 Ω or less can be used.
The accuracy of the output voltage is ensured at ± 1.0% under the specified conditions of fixed input
voltage
*1. Differs depending the product.
Caution If the above conditions change, the output voltage value may vary and exceed the
Indicates the dependency of the output voltage on the input voltage. That is, the values show how much
the output voltage changes due to a change in the input voltage with the output current remaining
unchanged.
Indicates the dependency of the output voltage on the output current. That is, the values show how
much the output voltage changes due to a change in the output current with the input voltage remaining
unchanged.
Indicates the difference between the input voltage V
the output voltage has fallen to 98% of the output voltage value V
from V
V
drop
regulation
= V
IN
*1
IN1
, fixed output current, and fixed temperature.
= V
accuracy range of the output voltage. Please see the electrical characteristics and
attached characteristics data for details.
− (V
OUT(S)




OUT3
∆V
OUT
+ 1.0 V, and the output voltage at that point (V
drop
∆V
IN
OUT2
)
× 0.98)
)
OUT1
•
V
)
OUT




Seiko Instruments Inc.
IN1
, which is the input voltage (V
OUT3
OUT3
× 0.98).
after V
IN
was gradually decreased
L
IN
. A capacitor whose
) at the point where
Rev.5.1
_00