MT28C128532W18 Micron Technology, MT28C128532W18 Datasheet - Page 11

• Manufacturer Part Number: MT28C128532W18
• Description: (MT28C128532W18 / MT28C128564W18) 128Mb Multibank Burst Flash 32Mb ASYNC/PAGE CellularRAM COMBO Memory
• Manufacturer: Micron Technology

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Boot Configurations
in Table 4 below. This table shows the possible config-
urations of the two Flash devices for either top boot or
bottom boot: F_CE1# and F_CE2# indicate to which
Flash die the configuration is referred.
Table 4:
MultiChip Packaging Considerations
lenges when controlling complex memory devices.
MT28C128564W18/W30D
Micron Flash devices with a single CellularRAM
device.
Unique IDs, State Machines, and
Registers
machine (CSM) and status register (SR) and read con-
figuration register (RCR). The RCR settings are sepa-
rate and can be different for the upper and lower
device. Each Flash device has its own OTP , CFI, and
device code. Depending on the boot configuration of
each Flash device, the OTP , CFI, and device code infor-
mation may differ.
09005aef80b10a55
MT28C128564W18D_B.fm - Rev. B, Pub 7/03 EN
Top/Top
Bottom/Top
Top/Bottom
Bottom/Bottom
CONFIGURATION
The possible configurations for Flash die are shown
Multichip packaging presents unique chal-
The
Each Flash device has a separate command state
Possible Boot Configurations
for Flash Die
MT28C128532W18/W30D
F_CE1#
Bottom
Bottom
Top
Top
devices
F_CE2#
Bottom
Bottom
Top
Top
32Mb/64Mb ASYNC/PAGE CellularRAM COMBO
combine
ORDER
CODE
BB
TT
BT
TB
and
two
11
128Mb MULTIBANK BURST FLASH
either Micron (0x2Ch) or Intel (0x89h), which is
defined by the part number. (Se Figure 4 on page 9.)
that defines how the device performs self refresh.
Command Codes
within each device.
crossing the array boundary between the upper
and lower Flash and the CellularRAM to ensure
that only one device is enabled at one time.
program (0x40/data), it is required that both com-
mands be issued to the same device.
operations occur simultaneously on two devices.
READ Operation
address boundaries of each device. A new page/ burst
operation must be started when crossing a device
boundary.
Flash Reset
Bringing RST# control LOW will reset both the
upper and lower device.
Power Consumption
calculations consider the active operation of the
upper and lower Flash as well as that of the Cellu-
larRAM. Total power consumed will be the sum of
the currents associated with the state of each
device. Table 9 on page 14 shows the power con-
sumption specifications.
Both Flash devices will share the same ManID,
The CellularRAM has a configuration register (CR)
All Flash command codes are independent
In a two-cycle command sequence such as word
It is not recommended that READ and ERASE
Page and burst read modes are limited to the
The reset control is shared by both Flash die.
Multiple chip packaging requires that power
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Care must be taken when
©2003 Micron Technology. Inc.
ADVANCE