MT5C1005 ASI, MT5C1005 Datasheet - Page 4
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MT5C1005
Manufacturer Part Number
MT5C1005
Description
SRAM MEMORY ARRAY
Manufacturer
ASI
Datasheet
1.MT5C1005.pdf
(13 pages)
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ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55
READ CYCLE
READ cycle time
Address access time
Chip Enable access time
Output hold from address change
Chip Enable to output in Low-Z
Chip disable to output in High-Z
Chip Enable to power-up time
Chip disable to power-down time
Output Enable access time
Output Enable to output in Low-Z
Output disable to output in High-Z
WRITE CYCLE
WRITE cycle time
Chip Enable to end of write
Address valid to end of write
Address setup time
Address hold from end of write
WRITE pulse width
Data setup time
Data hold time
Write disable to output in Low-Z
Write Enable to output in High-Z
o
C < T
DESCRIPTION
C
< 125
o
C; V
CC
= 5V +10%)
SYMBOL
t
t
t
t
t
t
t
HZWE
t
HZOE
LZWE
HZCE
LZOE
t
t
LZCE
t
t
t
t
t
t
t
t
t
t
ACE
AOE
t
WC
CW
AW
WP
OH
RC
AA
PU
PD
AS
AH
DS
DH
MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
20
20
15
15
15
12
3
3
0
0
0
0
0
3
0
-20
20
20
10
20
8
8
8
25
25
20
20
20
15
3
3
0
0
0
0
0
3
0
-25
25
25
12
25
10
10
10
35
35
30
30
30
20
3
3
0
0
0
0
0
3
0
-35
35
35
20
35
20
20
15
45
45
35
35
35
25
3
3
0
0
0
0
0
3
0
-45
45
45
25
45
25
25
20
MT5C1005
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4, 6, 7
4, 6, 7
4, 6, 7
4, 6, 7
4, 6, 7
4, 6, 7
4
4