MT5C1008LL Austin Semiconductor, MT5C1008LL Datasheet

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MT5C1008LL

Manufacturer Part Number
MT5C1008LL
Description
128K x 8 SRAM WITH DUAL CHIP ENABLE ULTRA LOW POWER
Manufacturer
Austin Semiconductor
Datasheet
128K x 8 SRAM
WITH DUAL CHIP ENABLE
ULTRA LOW POWER
AVAILABLE AS MILITARY
SPECIFICATIONS
•MIL-STD-883, para. 1.2.2 compliant
FEATURES
• High Speed: 30 ns
• Low active power: 715 mW worst case
• Low CMOS standby power: 3.3 mW worst case
• 2.0V data retention, Ultra Low 0.3mW worst
• Battery backup applications
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE1\, CE2, and OE\ options
OPTIONS
• Timing
• Package(s)
• Temperature
• Options
MT5C1008(LL)
Rev. 1.0 7/02
30ns access
Ceramic DIP (400 mil)
Military (-55°C to +125°C)
2V data retention/very low power
case power dissipation
For more products and information
www.austinsemiconductor.com
please visit our web site at
Austin Semiconductor, Inc.
MARKING
-30
MIL
LL
C
No. 111
1
GENERAL DESCRIPTION
static RAM organized as 131, 072 words by 8 bits, offering low
active power and ultra low standby and data retention current
levels. Easy memory expansion is provided by an active LOW
Chip Enable (CE1\), an active HIGH Chip Enable (CE2), and
active Low Output Enable (OE\), and three-state drivers.
Writing to the device is accomplished by taking Chip Enable
One (CE1\) and Write Enable (WE\) inputs LOW and Chip
Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O0
through I/O7) is then written into the location specified on the
address pins (A0 through A16).
Chip Enable One (CE
forcing Write Enable (WE\) and Chip Enable Two (CE
Under these conditions, the contents of the memory location
specified by the address pins will appear on the I/O pins.
in a high-impedance state when the device is deselected (CE1\)
HIGH or CE2 LOW), the outputs are disabled (OE\ HIGH), or
during a write operation (CE1\ LOW, CE2 HIGH, and WE\ LOW).
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
The MT5C1008 SRAM is a high-performance CMOS
Reading from the device is accomplished by taking
The eight input/output (I/O0 through I/O7) are placed
GND
PIN ASSIGNMENT
I/O0
I/O1
I/O2
A16
A14
A12
NC
A7
A6
A5
A4
A3
A2
A1
A0
1
\) and Output Enable (OE\) LOW while
32-Pin DIP (C)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
(Top View)
Ultra Low Power
MT5C1008(LL)
32
31
30
29
28
26
27
25
24
23
22
21
20
19
18
17
VCC
A15
CE2
WE\
A13
A8
A9
A11
OE\
A10
CE1\
I/O7
I/O6
I/O5
I/O4
I/O3
SRAM
SRAM
SRAM
SRAM
SRAM
2
) HIGH.

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MT5C1008LL Summary of contents

Page 1

... The eight input/output (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE1\) HIGH or CE2 LOW), the outputs are disabled (OE\ HIGH), or during a write operation (CE1\ LOW, CE2 HIGH, and WE\ LOW). Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 1 SRAM SRAM ...

Page 2

... Selected, Outputs Disabled MT5C1008(LL) Rev. 1.0 7/02 OE\ CE1\ CE2 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 2 SRAM SRAM SRAM SRAM SRAM MT5C1008(LL) Ultra Low Power WE\ I/O0 - I/O7 POWER X High Z Standby ( High Z Standby ( ...

Page 3

... > SB1 V < MAX > Vcc - 0.3V SB2 V < 0.3V Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 3 SRAM SRAM SRAM SRAM SRAM MT5C1008(LL) Ultra Low Power -30 MIN MAX UNITS NOTES 2.4 V 0.4 V 2 ...

Page 4

... TA = 25° 1MHz, Vcc = 5.0V o (-55 C < T < 125 C CONDITIONS 0.2V, Vcc = V = 2.0V, DR CE1\ > Vcc - 0.3V or CE2 < 0.3V, V > Vcc - 0. < 0. Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 4 SRAM SRAM SRAM SRAM SRAM MT5C1008(LL) Ultra Low Power SYM MAX UNITS ...

Page 5

... HZWE , t < and t < t for any given device. LZCE HZOE LZOE HZWE LZWE and t . HZWE SD Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 5 SRAM SRAM SRAM SRAM SRAM MT5C1008(LL) Ultra Low Power 5.0V +10%) CC -30 MIN MAX UNITS ...

Page 6

... WE\ is HIGH for read cycle. 3. Address valid prior to or coincident with CE1\ transition LOW and CE2 transition HIGH. MT5C1008(LL) Rev. 1.0 7/02 2,3 , CE2 = Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 6 SRAM SRAM SRAM SRAM SRAM MT5C1008(LL) Ultra Low Power ...

Page 7

... If CE1\ goes HIGH or CE2 goes LOW simultaneously with WE\ going HIGH, the output remains in a high-impedance state. 3. During this period the I/Os are in the output state and input signals should not be applied. MT5C1008(LL) Rev. 1.0 7/02 MT5C1008(LL) Ultra Low Power 1,2 1,2 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 7 SRAM SRAM SRAM SRAM SRAM ...

Page 8

... If CE1\ goes HIGH or CE2 goes LOW simultaneously with WE\ going HIGH, the output remains in a high-impedance state. 2. During this period the I/Os are in the output state and input signals should not be applied. MT5C1008(LL) Rev. 1.0 7/02 MT5C1008(LL) Ultra Low Power 1 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 8 SRAM SRAM SRAM SRAM SRAM ...

Page 9

... Detail A ASI SPECIFICATIONS MIN --- 0.014 0.038 0.008 --- 0.350 0.390 0.100 BSC 0.125 0.150 0.015 --- 0.005 0.005 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 9 SRAM SRAM SRAM SRAM SRAM MT5C1008(LL) Ultra Low Power MAX 0.232 ...

Page 10

... NOTE: For other speeds and options, see the MT5C1008 data sheet (available from www.austinsemiconductor.com). MT5C1008(LL) Rev. 1.0 7/02 ORDERING INFORMATION Package Speed Options** Process Type ns C -30 LL Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 10 SRAM SRAM SRAM SRAM SRAM MT5C1008(LL) Ultra Low Power /* o o -55 ...

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