MT9045 Zarlink Semiconductor, MT9045 Datasheet - Page 10

• Manufacturer Part Number: MT9045
• Description: T1/E1/OC3 System Synchronizer
• Manufacturer: Zarlink Semiconductor

The MT9045 has three possible modes of operation, Normal, Holdover and Freerun.
As shown in Table 3, Mode/Control Select pins MS2 and MS1 select the mode and method of control. Refer to
Table 4 and Figure 7 for details of the state change sequences.
Normal Mode
Normal Mode is typically used when a slave clock source, synchronized to the network is required.
In Normal Mode, the MT9045 provides timing (C1.5o, C2o, C4o, C8o, C16o and C19o) and frame synchronization
(F0o, F8o, F16o, TSP and RSP) signals, which are synchronized to one of two reference inputs (PRI or SEC). The
input reference signal may have a nominal frequency of 8kHz, 1.544MHz, 2.048MHz or 19.44MHz.
From a reset condition, the MT9045 will take up to 30 seconds (see AC Electrical Characteristics) of input reference
signal to output signals which are synchronized (phase locked) to the reference input.
The selection of input references is control dependent as shown in state Table 4. The reference frequencies are
selected by the frequency control pins FS2 and FS1 as shown in Table 1.
Fast Lock Mode
Fast Lock Mode is a submode of Normal Mode, it is used to allow the MT9045 to lock to a reference more quickly
than Normal Mode will allow. Typically, the PLL will lock to the incoming reference within 500ms if the FLOCK pin is
set high.
Holdover Mode
Holdover Mode is typically used for short durations (e.g., 2 seconds) while network synchronization is temporarily
disrupted.
In Holdover Mode, the MT9045 provides timing and synchronization signals, which are not locked to an external
reference signal, but are based on storage techniques. The storage value is determined while the device is in
Normal Mode and locked to an external reference signal.
When in Normal Mode, and locked to the input reference signal, a numerical value corresponding to the MT9045
output reference frequency is stored alternately in two memory locations every 30ms. When the device is switched
into Holdover Mode, the value in memory from between 30ms and 60ms is used to set the output frequency of the
device.
The frequency accuracy of Holdover Mode is
in 24 hours. This satisfies the AT&T TR62411 and Bellcore GR-1244-CORE Stratum 3 requirement of
(255 frame slips per 24 hours).
Two factors affect the accuracy of Holdover Mode. One is drift on the Master Clock while in Holdover Mode, drift on
the Master Clock directly affects the Holdover Mode accuracy. Note that the absolute Master Clock (OSCi)
accuracy does not affect Holdover accuracy, only the change in OSCi accuracy while in Holdover. For example, a
±
32ppm master clock may have a temperature coefficient of
MS2
0
0
1
1
Table 3 - Operating Modes and States
MS1
0
1
0
1
±
Zarlink Semiconductor Inc.
0.05ppm, which translates to a worst case 35
MT9045
10
HOLDOVER
FREERUN
±
NORMAL
Reserved
0.1ppm per degree C. So a
Mode
±
10 degree change in
frame (125us) slips
Data Sheet
±
0.37ppm