MT90732 Mitel Networks Corporation, MT90732 Datasheet
![no-image](/images/no-image-200.jpg)
MT90732
Related parts for MT90732
MT90732 Summary of contents
Page 1
... The E2/E3 Framer interfaces to line circuitry with either dual rail or NRZ signals. On the terminal side, the interface can be either nibble-parallel or bit- serial. The MT90732 can be operated with or without a microprocessor. microprocessor, the E2/E3 Framer provides an 8- byte memory map for control, performance counters and alarm status. The MT90732 provides a transmit ...
Page 2
... MT90732 CMOS 10 ROC ROF NRZLINE 14 BIP VDD 17 GND 18 19 MICRO SER 20 TLBK 21 22 PLBK TAIS 23 LPT 24 TLOC 25 26 FORCEFE Pin Description Power Supply and Ground Pin # Name I/O/P 1,17,35,51 VDD P 18,34,52,68 GND P Note Input Output Power Line Side Receive Pin # ...
Page 3
... For a serial interface, the TCIN is used to derive the clock out (TCOUT), data signal (TDOUT), framing pulse (TFOUT), and gapped clock signal (TCG).The reference generator signals are provided for multiplexing the external payload data into the serial frame. MT90732 CMOS 5-17 ...
Page 4
... MT90732 CMOS Terminal Interface Pin # Name I/O/P 56 XNIB0/XSD I 57 XCK I 58 XNF O 59 XNC/TCOU O T Note Input Output Power Service Bit Interface Pin # Name I/O/P 9 ROD O 10 ROC O 11 ROF O 27 TOD I 28 TOC O 29 TOF O Note Input Output Power Microprocessor Interface Pin # ...
Page 5
... Loop Timing. A low enables the loop timing feature. Loop timing disables the transmit clock and enables the receive clock to be used as the transmit clock. Force Framing Error. The errored bit is sent into the framing pattern upon the high-to-low transition of this pin. MT90732 CMOS G.745 8448 G ...
Page 6
... MT90732 CMOS Control Interface Pin # Name I/O/P 30 RESET I 49 DAIS I 50 TLCINV RAIS O 7 RLOC O 8 RLOF TLOC O 60 BIP-4E O Note Input Output Power Functional Description The block diagram for the E2/E3F is shown in Figure 1. The E2/E3F receives NRZ data signal (RDL) and ...
Page 7
... Data Source, adds framing pattern and service bits and sends it out to LIU. The E2/E3 Framer handles wideband data at either 8448 or 34 368 Kb/s, and can optionally perform BIP-4 making data transport more reliable. Line Side Terminal Side E2/E3 Framer Overhead bit-I/O MT90732 CMOS Wideband Data Sink/ Source 5-21 ...
Page 8
... MT90732 CMOS Notes. 5-22 Advance Information ...