P123-042 PhaseLink Corp., P123-042 Datasheet - Page 4

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P123-042

Manufacturer Part Number
P123-042
Description
3.3v Zero Delay Buffer
Manufacturer
PhaseLink Corp.
Datasheet
Notes: 4. Parameter is guaranteed by design and characterization. Not 100% tested in production.
OPERATING CONDITIONS
Notes: 3: Applies to both REF clock and FBK inputs.
ELECTRICAL CHARACTERISTICS
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 7/19/07 Page 4
Parameter
VIL
VIH
IIL
IIH
VOL
VOH
IDD (PD mode) Power Down Supply Current
IDD
Parameter
V
T
C
C
t
PU
A
DD
L
IN
Description
Supply Voltage
Commercial Operating Temperature (ambient temperature)
Industrial Operating Temperature (ambient temperature)
Load Capacitance, below 100 MHz
Load Capacitance, above 100 MHz
Input Capacitance
Power-up time for all VDDs to reach minimum specified voltage
(power ramps must be monotonic)
Input LOW Voltage
Input HIGH Voltage
Input LOW Current
Input HIGH Current
Output LOW Voltage
Output HIGH Voltage
Supply Current
(Unloaded Outputs)
Description
[3]
[4]
[4]
VIN = 0V
VIN = VDD
IOL = 8 mA
IOH = –8 mA
REF = 0 MHz, Commercial Temp.
REF = 0 MHz, Industrial Temp.
100-MHz REF
Select inputs at VDD or GND
66-MHz REF, Commercial Temp.
33-MHz REF, Commercial Temp.
66-MHz REF, Industrial Temp.
33-MHz REF, Industrial Temp.
Test Conditions
3.3V Zero Delay Buffer
(Preliminary)
Min.
2.0
2.4
Min.
0.05
-40
3.0
0
PL123-04
Max.
100.0
50.0
12.0
25.0
45.0
32.0
18.0
35.0
20.0
0.8
0.4
Max.
3.6
70
85
30
15
50
7
Unit
Unit
ms
°C
°C
pF
pF
pF
mA
mA
mA
mA
mA
µA
µA
µA
µA
V
V
V
V
V

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