P130-07SC PhaseLink Corp., P130-07SC Datasheet - Page 2

• Manufacturer Part Number: P130-07SC
• Description: High Speed Translator Buffer To Lvcmos
• Manufacturer: PhaseLink Corp.

PIN DESCRIPTION
OE LOGIC TABLE
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent
damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the
device at these or any other conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL
grade only.
47745 Fremont Blvd., Fremont, California 94538 Tel [phone] Fax [phone] www.phaselink.com Rev 11/14/07 Page 2
PLL130-07
PLL130-07A
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
DRV_SEL
CLK_OUT
REF_IN
Name
GND
VDD
Part Number
OE
SOP-8L
1,3,6
N/A
4,7
8
2
5
PARAMETERS
TSSOP-8L
1 (Default)
0 (Default)
OE State
1,7
3
2
5
8
4
0
1
7,10,11,12
QFN-16L
1,2,4,5,
9,14,15
13
16
3
8
Type
High Speed Translator Buffer to LVCMOS
O
P
P
I
I
I
Ground.
Power supply.
Drive Select input: ‘1’ for standard drive, ‘0’ for hi-
drive output. Internal pull-up (default is ‘1’).
Reference input signal. The frequency of this signal
will be reproduced at the output (after translation to
CMOS level).
CMOS clock output.
Output Enable. See OE LOGIC TABLE below
SYMBOL
V
V
T
T
T
V
DD
O
S
A
J
I
Output Buffer State
Tri-State
Tri-State
Active
Active
MIN.
-0.5
-0.5
-65
-40
Description
V
V
MAX.
DD
DD
150
125
260
4.6
85
2
+0.5
+0.5
UNITS
C
C
C
C
kV
V
V
V