P130-69 PhaseLink Corp., P130-69 Datasheet - Page 2

• Manufacturer Part Number: P130-69
• Description: High Speed Translator Buffers Single Ended To Pecl Or Lvds
• Manufacturer: PhaseLink Corp.

PIN DESCRIPTION
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. General Electrical Specifications
47745 Fremont Blvd., Fremont, California 94538 Tel [phone] Fax [phone] www.phaselink.com Rev 11/29/04 Page 2
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
Supply Current
(both outputs loaded)
Operating Voltage
Output Clock Duty Cycle
Short Circuit Current
OECTRL
OESEL
Q_BAR
Q_BAR
Name
REFIN
GND
VDD
NC
Q
Q
PARAMETERS
Pin number
1, 3, 4, 6,
8, 12, 14
10
11
13
15
16
2
5
7
9
PARAMETERS
High Speed Translator Buffers: Single ended to PECL or LVDS
SYMBOL
Type
V
I
DD
DD
O
O
O
O
P
P
-
I
I
I
Fout = 156.25MHz, PECL
Fout = 156.25MHz, LVDS
@ Vdd – 1.3V (PECL)
@ 1.25V (LVDS)
No connection.
Reference input signal. The frequency of this signal will be reproduced
at the output (after translation to PECL or LVDS level).
Output enable input (See OE Logic Table on page 1).
Ground connector.
Output enable logic selector (See OE Logic Table on page 1).
Complementary output. PECL_bar on PLL130-68, LVDS_bar on
PLL130-69.
True output. PECL on PLL130-68, LVDS on PLL130-69.
3.3V Power supply.
Additional true output. PECL on PLL130-68, LVDS on PLL130-69. This
output is the same as pin 11.
Additional complementary output. PECL_bar on PLL130-68, LVDS_bar
on PLL130-69. This output is the same as pin 10.
CONDITIONS
SYMBOL
V
V
T
T
V
T
DD
O
S
A
J
I
Description
MIN.
2.97
45
22
MIN.
PLL130-68/-69
-0.5
-0.5
-65
-40
Same as input
Same as input
TYP.
±50
48
25
V
V
MAX.
DD
DD
150
125
260
4.6
85
2
+0.5
+0.5
MAX.
3.63
51
28
UNITS
°C
°C
°C
°C
kV
UNITS
V
V
V
mA
mA
%
V