SSTUA32864 Philips Semiconductors, SSTUA32864 Datasheet
SSTUA32864
Available stocks
Related parts for SSTUA32864
SSTUA32864 Summary of contents
Page 1
... Rev. 01 — 12 May 2005 1. General description The SSTUA32864 is a 25-bit 14-bit configurable registered buffer designed for 1 2 All clock and data inputs are compatible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS. All outputs are 1.8 V CMOS drivers that have been optimized to drive the DDR2 DIMM load ...
Page 2
... Configurable register supporting DDR2 Registered DIMM applications Configurable to 25-bit mode or 14-bit mode Controlled output impedance drivers enable optimal signal integrity and speed Exceeds SSTUA32864 JEDEC specification speed performance (1.8 ns max. single-bit switching propagation delay; 2.0 ns max. mass-switching) Supports up to 450 MHz clock frequency of operation ...
Page 3
... Philips Semiconductors 5. Functional diagram (1) Disabled configuration. Fig 1. Functional diagram of SSTUA32864 mode (positive logic) 9397 750 14757 Product data sheet 1.8 V configurable registered buffer for DDR2-667 RDIMM applications RESET CK CK VREF DCKE DODT DCS CSR D1 to other channels Rev. 01 — 12 May 2005 ...
Page 4
... GND L D9 D20 D10 D21 GND N D11 D22 D12 D23 GND R D13 D24 D14 D25 VREF Rev. 01 — 12 May 2005 SSTUA32864 002aab384 QCKE DNU DD GND Q2 Q15 V Q3 Q16 DD GND QODT DNU V Q5 Q17 DD GND Q6 ...
Page 5
... L D9 DNU D10 DNU GND N DODT DNU D12 DNU GND R D13 DNU DCKE DNU VREF Rev. 01 — 12 May 2005 SSTUA32864 QCKEA QCKEB DD GND Q2A Q2B V Q3A Q3B DD GND QODTA QODTB V Q5A Q5B DD GND Q6A Q6B ...
Page 6
... Not connected. Ball present but no internal connection to the die. - Do-not-use. Ball internally connected to the die which should be left open-circuit. 3, Figure 4, and Figure 5 for ball number. Rev. 01 — 12 May 2005 SSTUA32864 [2] [3] . © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
Page 7
... floating floating floating Rev. 01 — 12 May 2005 SSTUA32864 = LOW-to-HIGH transition; Outputs CK Dn, Qn DODT, DCKE ...
Page 8
... O DD Conditions Min 1.7 0.49 V ref 0 V ref data inputs (Dn), CSR - V ref data inputs (Dn), CSR - [1] RESET, Cn 0.65 [1] RESET [2] CK, CK 0.675 [2] CK, CK 600 - - operating in free air 0 Rev. 01 — 12 May 2005 SSTUA32864 Min Max 0.5 +2.5 [1] [2] 0.5 +2.5 [1] [ 100 65 +150 Typ Max - 2.0 V 0. ...
Page 9
... One data input switching at half clock frequency duty cycle mA 2 250 mV 1 ref 0 600 mV; ICR 1 GND 1 Rev. 01 — 12 May 2005 SSTUA32864 Min Typ Max Unit 1 0 100 ...
Page 10
... 1.8 V amb pF; unless otherwise specified. See L Conditions CK and CK to output CK and CK to output RESET to output = 1.8 V 0.1 V; unless otherwise specified. DD Conditions Rev. 01 — 12 May 2005 SSTUA32864 0.1 V; unless otherwise specified. Min Typ Max - - 450 [1] [ ...
Page 11
... ICR V = 600 250 mV (AC voltage levels) for differential inputs ref 250 mV (AC voltage levels) for differential inputs ref Rev. 01 — 12 May 2005 SSTUA32864 20 %, unless otherwise specified. DUT T = 350 ps OUT ( ...
Page 12
... PLH PHL 250 mV (AC voltage levels) for differential inputs ref 250 mV (AC voltage levels) for differential inputs ref Rev. 01 — 12 May 2005 SSTUA32864 V V ICR ref V IL 002aaa374 = V for LVCMOS inputs. ...
Page 13
... V configurable registered buffer for DDR2-667 RDIMM applications 0 input slew rate = 1 V/ns 0 DUT OUT includes probe and jig capacitance. L output dv_f DUT OUT includes probe and jig capacitance. L dv_r output Rev. 01 — 12 May 2005 SSTUA32864 20 %, unless otherwise specified test point ( 002aaa377 ...
Page 14
... 5.6 13.6 0 0.15 5.4 13.4 REFERENCES JEDEC JEITA Rev. 01 — 12 May 2005 SSTUA32864 detail 0.1 0.1 0.2 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2005. All rights reserved. SOT536-1 ISSUE DATE 00-03-04 03-02- ...
Page 15
... Product data sheet 1.8 V configurable registered buffer for DDR2-667 RDIMM applications 2.5 mm Rev. 01 — 12 May 2005 SSTUA32864 3 350 mm so called 3 so called small/thin packages. © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...
Page 16
... LBGA, LFBGA, SQFP, [3] , TFBGA, VFBGA, XSON , SO, SOJ [8] [9] [8] , PMFP , WQCCN.. measured in the atmosphere of the reflow oven. The package Rev. 01 — 12 May 2005 SSTUA32864 Soldering method Wave Reflow not suitable suitable [4] not suitable suitable suitable suitable [5] [6] not recommended suitable ...
Page 17
... Low Voltage Complementary Metal Oxide Silicon Pulse Repetition Rate Registered Dual In-line Memory Module Stub Series Terminated Logic Data sheet status Change notice Product data sheet - Rev. 01 — 12 May 2005 SSTUA32864 Doc. number Supersedes 9397 750 14757 - © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
Page 18
... Trademarks Notice — All referenced brands, product names, service names and trademarks are the property of their respective owners. Rev. 01 — 12 May 2005 SSTUA32864 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...
Page 19
... No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Published in The Netherlands SSTUA32864 Date of release: 12 May 2005 Document number: 9397 750 14757 ...