MC74ACT541DWR2 ON Semiconductor, MC74ACT541DWR2 Datasheet - Page 4

• Manufacturer Part Number: MC74ACT541DWR2
• Description: IC BUFF/DVR TRI-ST 8BIT 20SOIC
• Manufacturer: ON Semiconductor
• Series: 74ACTr

Specifications of MC74ACT541DWR2

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Current - Output High, Low: 24mA, 24mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: MC74ACT541DWROSCT

*Voltage Range 3.3 V is 3.3 V ±0.3 V.
AC CHARACTERISTICS
Voltage Range 5.0 V is 5.0 V ±0.5 V.
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
PLH
PHL
PZH
PHZ
PLH
PHL
PZH
PHZ
PZL
PLZ
PZL
PLZ
Propagation Delay
Data to Output (
Propagation Delay
Data to Output (
Output Enable Time
(
Output Enable Time
(
Output Disable Time
(
Output Disable Time
(
Propagation Delay
Data to Output (
Propagation Delay
Data to Output (
Output Enable Time
(
Output Enable Time
(
Output Disable Time
(
Output Disable Time
(
′
′
′
′
′
′
′
′
AC540)
AC540)
AC540)
AC540)
AC541)
AC541)
AC541)
AC541)
MC74AC540, MC74ACT540, MC74AC541, MC74ACT541
Parameter
(For Figures and Waveforms − See AND8277/D at www.onsemi.com)
′
′
′
′
AC540)
AC540)
AC541)
AC541)
V
(V)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
CC
http://onsemi.com
*
Min
1.5
1.5
1.5
1.5
3.0
2.0
2.5
2.0
2.5
1.5
2.0
1.5
2.0
1.5
2.0
1.5
3.0
2.0
2.5
1.5
3.5
2.0
2.5
2.0
4
T
C
A
L
74AC
= +25°C
= 50 pF
Typ
5.5
4.0
5.0
4.0
8.5
6.5
7.5
6.0
8.5
7.5
7.0
6.0
5.5
4.0
5.5
4.0
8.0
6.0
7.0
5.5
9.0
7.0
6.5
5.5
Max
10.5
12.5
11.5
7.5
6.0
7.0
5.5
8.5
7.5
8.0
8.0
6.0
8.0
6.0
8.5
7.5
9.5
9.5
7.5
11
10
13
10
10
T
A
Min
1.0
1.0
1.0
1.0
2.5
2.0
2.0
1.5
1.5
1.0
2.0
1.5
1.5
1.0
1.5
1.0
3.0
1.5
2.5
1.0
2.5
1.0
2.0
1.0
= −40°C to +85°C
C
L
74AC
= 50 pF
Max
12.5
10.5
10.5
11.5
8.0
6.5
7.5
6.0
9.5
8.5
9.0
9.0
6.5
8.5
6.5
9.5
8.5
8.5
12
11
14
11
11
14
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Fig.
No.
3−5
3−5
3−7
3−8
3−7
3−8
3−5
3−5
3−7
3−8
3−7
3−8