MC100EPT20 ON Semiconductor, MC100EPT20 Datasheet - Page 8

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MC100EPT20

Manufacturer Part Number
MC100EPT20
Description
3.3VLVTTL/LVCMOS to Differential LVPECL Translator
Manufacturer
ON Semiconductor
Datasheet

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PUBLICATION ORDERING INFORMATION
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
LITERATURE FULFILLMENT:
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P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
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Email: orderlit@onsemi.com
ON Semiconductor and
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
0.15 (0.006) T
0.15 (0.006) T
−T−
0.10 (0.004)
SEATING
PLANE
L
U
U
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
S
S
PIN 1
IDENT
D
2X
L/2
C
8
1
−V−
A
8x
5
4
K
G
0.10 (0.004)
REF
MC10EPT20, MC100EPT20
−U−
B
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
PACKAGE DIMENSIONS
PLASTIC TSSOP PACKAGE
http://onsemi.com
M
CASE 948R−02
T
DT SUFFIX
U
TSSOP−8
DETAIL E
ISSUE A
S
8
DETAIL E
V
S
F
0.25 (0.010)
M
−W−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
5. TERMINAL NUMBERS ARE SHOWN FOR
6. DIMENSION A AND B ARE TO BE DETERMINED
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
Y14.5M, 1982.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
REFERENCE ONLY.
AT DATUM PLANE −W−.
DIM
A
B
C
D
G
K
M
F
L
MILLIMETERS
MIN
2.90
2.90
0.80
0.05
0.40
0.25
0
0.65 BSC
4.90 BSC
_
MAX
3.10
3.10
1.10
0.15
0.70
0.40
6
_
0.114
0.114
0.031
0.002
0.016
0.010
MIN
MC10EPT20/D
0.026 BSC
0.193 BSC
0
INCHES
_
0.122
0.122
0.043
0.006
0.028
0.016
MAX
6
_

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