EMC1404 SMSC Corporation, EMC1404 Datasheet - Page 39

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EMC1404

Manufacturer Part Number
EMC1404
Description
(EMC1403 / EMC1404) Temperature Sensor
Manufacturer
SMSC Corporation
Datasheet

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ADDR.
1°C Temperature Sensor with Beta Compensation
Datasheet
SMSC EMC1403/EMC1404
6.16
6.17
37h
ADDR.
36h
R/W
R-C
Low Limit Status Register
THERM Limit Status Register
R/W
R-C
Bit 0 - IHIGH - This bit is set when the Internal Diode channel exceeds its programmed high limit.
The Low Limit Status Register contains the status bits that are set when a temperature channel drops
below the low limit. If any of these bits are set, then the LOW status bit in the Status Register is set.
Reading from the Low Limit Status Register will clear all bits. Reading from the register will also clear
the LOW status bit in the Status Register.
The ALERT pin will be set if the programmed number of consecutive alert counts have been met and
any of these status bits are set.
The status bits will remain set until read unless the ALERT pin is configured as a comparator output
(see
Bit 3 - E3LOW - This bit is set when the External Diode 3 channel drops below its programmed low
limit.
Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low
limit.
Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low
limit.
Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.
The THERM Limit Status Register contains the status bits that are set when a temperature channel
THERM Limit is exceeded. If any of these bits are set, then the THERM status bit in the Status Register
is set. Reading from the THERM Limit Status Register will not clear the status bits. Once the
temperature drops below the THERM Limit minus the THERM Hysteresis, the corresponding status
bits will be automatically cleared. The THERM bit in the Status Register will be cleared when all
individual channel THERM bits are cleared.
Bit 3 - E3THERM - This bit is set when the External Diode 3 channel exceeds it’s programmed THERM
Limit. When set, this bit will assert the THERM pin.
Bit 2 - E2THERM - This bit is set when the External Diode 2 channel exceeds it’s programmed THERM
Limit. When set, this bit will assert the THERM pin.
Bit 1 - E1THERM - This bit is set when the External Diode 1 channel exceeds it’s programmed THERM
limit. When set, this bit will assert the THERM pin.
Limit Status
REGISTER
THERM
Section
REGISTER
Low Limit
Status
5.3.2).
B7
-
Table 6.21 THERM Limit Status Register
Table 6.20 Low Limit Status Register
B7
-
B6
-
B6
-
DATASHEET
B5
-
B5
-
39
B4
-
B4
-
THERM
B3
E3
E3L
OW
-
B3
THERM
E2L
OW
B2
B2
E2
E1LOW
THERM
B1
B1
E1
Revision 1.16 (03-15-07)
ILOW
ITHERM
B0
B0
DEFAULT
DEFAULT
00h
00h

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