DS36C280M National Semiconductor, DS36C280M Datasheet

DS36C280M

Manufacturer Part Number

DS36C280M

Description

Slew Rate Controlled CMOS EIA-RS-485 Transceiver

Manufacturer

National Semiconductor

Datasheet

1.DS36C280M.pdf (10 pages)

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DS36C280

Slew Rate Controlled CMOS EIA-RS-485 Transceiver

General Description

The DS36C280 is a low power differential bus/line trans-

ceiver designed to meet the requirements of RS-485 Stan-

dard for multipoint data transmission. In addition, it is com-

patible with TIA/EIA-422-B.

The slew rate control feature allows the user to set the driver

rise and fall times by using an external resistor. Controlled

edge rates can reduce switching EMI.

The CMOS design offers significant power savings over its

bipolar and ALS counterparts without sacrificing ruggedness

against ESD damage. The device is ideal for use in battery

powered or power conscious applications. I

500 µA maximum.

The driver and receiver outputs feature TRI-STATE

ity. The driver outputs operate over the entire common mode

range of −7V to +12V. Bus contention or fault situations are

handled by a thermal shutdown circuit, which forces the

driver outputs into the high impedance state.

The receiver incorporates a fail safe circuit which guarantees

a high output state when the inputs are left open (Note 1) .

Connection and Logic Diagram

TRI-STATE

Order Number DS36C280TM, DS36C280TN

See NS Package Number M08A or N08E

is a registered trademark of National Semiconductor Corporation.

DS36C280M and DS36C280N

DS012052

DS012052-1

is specified at

capabil-

Features

n 100% RS-485 compliant

n Low power CMOS design:

n Adjustable slew rate control

n Built-in power up/down glitch-free circuitry

n DIP and SOIC packages available

n Industrial temperature range: −40˚C to +85˚C

n On-board thermal shutdown circuitry

n Wide common mode range: −7V to +12V

n Receiver open input fail-safe (Note 1)

n ESD (human body model):

Truth Table

Note 1: Non-terminated, Open Inputs only

DRIVER SECTION

RECEIVER SECTION

— Guaranteed RS-485 device interoperation

— Minimizes EMI affects

— Permits live transceiver insertion/displacement

— Prevents damage to the device in the event of

⁄

DE/RE*

excessive power dissipation

unit load (DS36C280):

unit load (DS36C280T):

OPEN (Note 1)

RI-RI*

+0.2V

−0.2V

128 nodes

DO/RI

64 nodes

2 kV

500 µA max

www.national.com

DO*/RI*

July 1998

Related parts for DS36C280M

DS36C280M Summary of contents

Page 1

... The receiver incorporates a fail safe circuit which guarantees a high output state when the inputs are left open (Note 1) . Connection and Logic Diagram Order Number DS36C280TM, DS36C280TN DS36C280M and DS36C280N See NS Package Number M08A or N08E TRI-STATE ® registered trademark of National Semiconductor Corporation. ...

Page 2

... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Input Voltage (DE/RE*, & DI) Common Mode ( Driver Output/Receiver Input Input Voltage (DO/RI, DO*/RI*) Receiver Output Voltage Maximum Package Power Dissipation M Package 1190 mV, derate 9.5 mW/˚ ...

Page 3

Electrical Characteristics Over Supply Voltage and Operating Temperature ranges, unless otherwise specified Symbol Parameter RECEIVER CHARACTERISTICS I Short Circuit Current V OSR I TRI-STATE Leakage V OZR Current DEVICE CHARACTERISTICS V High Level Input Voltage IH V Low Level Input ...

Page 4

Switching Characteristics Note 6: Threshold parameter limits specified as an algebraic value rather than by magnitude. Note 7: Hysteresis defined − HST TH TL Note 8: I includes the receiver input current and driver ...

Page 5

Parameter Measurement Information (Continued) FIGURE 8. TRI-STATE Waveforms (t FIGURE 9. TRI-STATE Test Circuit (t FIGURE 13. Receiver Differential Propagation Delay Waveforms FIGURE 14. Receiver TRI-STATE Test Circuit FIGURE 10. TRI-STATE Waveforms (t DS012052 PZH PHZ FIGURE ...

Page 6

Parameter Measurement Information FIGURE 15. Receiver Enable and Disable Waveforms (t FIGURE 16. Receiver Enable and Disable Waveforms (t Typical Application Information Pin Name # 1 RO Receiver Output: When DE/RE* (Receiver Enable) is LOW, the receiver is enabled (ON), ...

Page 7

Typical Application Information TABLE 1. Device Pin Descriptions (Continued) Pin Name # 5 GND Ground Connection 6 DO/RI Driver Output/Receiver Input, 485 Bus Pin. 7 DO*/RI* Driver Output/Receiver Input, 485 Bus Pin Positive Power Supply Connection: Recommended operating ...

Page 8

Slew Rate Control (Continued) www.national.com Differential Rise/Fall Time vs Slew Rate Resistor DS012052-20 FIGURE 19. Slew Rate Resistor vs Rise/Fall Time 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead (0.150" Wide) Molded Small Outline Package, JEDEC 8-Lead (0.300" Wide) Molded Dual-In-Line Package Order Number DS36C280TM NS Package Number M08A Order Number DS36C280TN NS Package Number N08E 9 www.national.com ...

Page 10

... National Semiconductor Asia Pacific Customer Fax: +49 (0) 1 80-530 85 86 Response Group Email: europe.support@nsc.com Tel: 65-2544466 Fax: 65-2504466 Tel: +49 (0) 1 80-532 78 32 Email: sea.support@nsc.com Tel: +49 (0) 1 80-534 16 80 National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 ...

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