SDA2546-5 Siemens Semiconductor, SDA2546-5 Datasheet
SDA2546-5
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SDA2546-5 Summary of contents
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Nonvolatile Memory 4-Kbit E 2 with I C Bus Interface Preliminary Data Features Word-organized reprogrammable nonvolatile memory in n-channel floating-gate technology (E 512 8-bit organization Supply voltage 5 V Serial 2-line bus for data input and output (I Reprogramming ...
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Control Functions of the I The device is controlled by the controller (master) via I and reprogramming cycle, including erase and write to a memory address. In both operating modes, the controller, as transmitter, has to provide 3 bytes to ...
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Memory Reprogramming The reprogramming cycle of a memory word comprises an erase and a subsequent write process. During erase, all eight bits of the selected word are set into "1" state. During the write process, "0" states are generated according ...
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Pin Configuration (top view) Pin Definitions and Functions Pin No. Symbol TP1 4 TP2 5 SDA 6 SCL 7 TP3 Semiconductor Group Function Ground Chip select ...
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Block Diagram Semiconductor Group 33 SDA 2546-5 ...
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Absolute Maximum Ratings Parameter Supply voltage Input voltage Power dissipation Storage temperature Thermal resistance (system-air) Junction temperature Operating Range Supply voltage Ambient temperature Semiconductor Group Symbol Limit Values min. V – 0 – 0 ...
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Characteristics ˚C A Parameter Supply voltage Supply current Inputs Input voltages SDA/SCL Input voltages SDA/SCL Input currents SDA/SCL Outputs Output current SDA Leakage current SDA Inputs Input voltages CS/TP1/TP2 Input voltages CS/TP1/TP2 Input currents CS/TP1/TP2 Clock frequency ...
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Test Circuit Application Circuit Semiconductor Group 36 SDA 2546-5 ...
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Diagrams Figure 1 Operational States of the I Figure 2 Timing Conditions for the I Semiconductor Group 2 C Bus 2 C Bus (high-speed mode) 37 SDA 2546-5 ...
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Timing Conditions Parameter Minimum time the bus must be free before a new transmission can start Start condition hold time Clock low period Clock high period Start condition set-up time, only valid for repeated start code Data set-up time Rise ...
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Figure 3 Programming Control word input ST CS Figure 4 Read Control word input read a) complete (with word address input shortened: Bit 0 … 8 the last adapted word address keep unchanged ...
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Control Word Table Clock No. 1 CS Control Word Input Key CS/E Chip select for data input into memory (with the word-address-bit A8) CS/A Chip select for data output out of ...