AD633 Analog Devices, AD633 Datasheet - Page 4

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AD633

Manufacturer Part Number
AD633
Description
Low Cost Analog Multiplier
Manufacturer
Analog Devices
Datasheet

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AD633
At
attenuated by 2), and the Y input lags the X input by 45 (and
is also attenuated by 2). Since the X and Y inputs are 90 out of
phase, the response of the circuit will be (satisfying Equation 3):
which has no dc component. Resistors R1 and R2 are included to
restore the output amplitude to 10 V for an input amplitude of 10 V.
The amplitude of the output is only a weak function of fre-
quency: the output amplitude will be 0.5% too low at
0.9
Generating Inverse Functions
Inverse functions of multiplication, such as division and square
rooting, can be implemented by placing a multiplier in the feed-
back loop of an op amp. Figure 6 shows how to implement a
square rooter with the transfer function
for the condition E<0.
W
E
40
o
E
W
10k
o
= 1/CR, the X input leads the input signal by 45 (and is
V
2
, and
R
10
Figure 5. ”Bounceless” Frequency Doubler
1
Figure 6. Connections for Square Rooting
V
sin
E
C
R
E
2
10
o
AD711
2
+15
–15
= 1.1
V E
sin
o
t
0.1 F
0.1 F
1
2
3
4
X1
X2
Y1
Y2
o
AD633JN
t
o
.
45
+V
–V
W
S
Z
S
1
2
3
4
10k
E
R
8
7
6
5
2
X1
X2
Y1
Y2
AD633JN
+15V
0.1 F
sin
0.1 F
–15V
1k
R1
+V
–V
o
W
t
S
Z
S
R2
3k
8
7
6
5
W =
+15V
45
–15V
1N4148
0.1 F
0.1 F
10V
W =
E
2
(Equation 5)
(Equation 4)
–(10V)E
=
–4–
Likewise, Figure 7 shows how to implement a divider using a
multiplier in a feedback loop. The transfer function for the
divider is
Variable Scale Factor
In some instances, it may be desirable to use a scaling voltage
other than 10 V. The connections shown in Figure 8 increase
the gain of the system by the ratio (R1 + R2)/R1. This ratio is
limited to 100 in practical applications. The summing input, S,
may be used to add an additional signal to the output or it may
be grounded.
Current Output
The AD633’s voltage output can be converted to a current
output by the addition of a resistor R between the AD633’s W
and Z pins as shown in Figure 9 below. This arrangement forms
INPUT
INPUT
E
Y
X
W
10k
Figure 8. Connections for Variable Scale Factor
INPUT
INPUT
R
X
Y
1
2
3
4
Figure 9. Current Output Connections
X1
X2
Y1
Y2
10
AD633JN
Figure 7. Connections for Division
1
2
3
4
AD711
V
+15
–15
X1
X2
Y1
Y2
AD633JN
E
+V
–V
0.1 F
0.1 F
E
W
X
S
Z
S
8
7
6
5
+V
–V
+15V
W
0.1 F
Z
S
S
E
0.1 F
X
8
7
6
5
–15V
–15V
+15V
R1
R
1
2
3
4
S
0.1 F
0.1 F
10k
R2
R
X1
X2
Y1
Y2
AD633JN
W =
(X
I
O
1
=
1k
+V
–V
– X
W
1
R
S
Z
S
1k
10V
2
) (Y
8
7
6
5
(X
R1, R2
+15V
1
1
–15V
– Y
– X
R
1N4148
0.1 F
10V
2
2
0.1 F
W = –10V
)
) (Y
100k
(Equation 6)
100k
(R1 + R2)
1
– Y
R1
2
REV. B
)
E
E
X
+ S

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