AD642 Analog Devices, AD642 Datasheet

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AD642

Manufacturer Part Number
AD642
Description
Precision/ Low Cost Dual BiFET Op Amp
Manufacturer
Analog Devices
Datasheet

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a
PRODUCT DESCRIPTION
The AD642 is a pair of matched high speed monolithic BiFET
operational amplifier fabricated with the most advanced bipolar,
JFET and laser trimming technologies. The AD642 offers
matched bias currents that are significantly lower than currently
available monolithic dual FET input operational amplifiers:
35 pA max matched to 25 pA for the AD642K and L; 75 pA
max, matched to 35 pA for the AD642J and S. In addition, the
offset voltage is laser trimmed to less than 0.5 mV and matched
to 0.25 mV for the AD642L, 1.0 mV and matched to 0.5 mV for
the AD642K, utilizing Analog’s laser-wafer trimming (LWT)
process.
The tight matching and temperature tracking between the
operational amplifiers is achieved by ion-implanted JFETs and
laser-wafer trimming. Ion-implantation permits the fabrication of
precision, matched JFETs on a monolithic bipolar chip. The
optimizes the process to product matched bias currents which
have lower initial bias currents than other popular BiFET op
amps. Laser-wafer trimming each amplifier’s input offset voltage
assures tight initial match and combined with superior IC
processing guarantees offset voltage tracking over the tempera-
ture range.
The AD642 is recommended for applications in which excellent
ac and dc performance is required. The matched amplifiers
provide a low-cost solution for true instrumentation amplifiers,
log ratio amplifiers, and output amplifiers for four quadrant
multiplying D/A converters such as the AD7541.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
Matched Offset Voltage
Matched Offset Voltage Over Temperature
Matched Bias Current
Crosstalk: –124 dB @ 1 kHz
Low Bias Current: 35 pA max Warmed Up
Low Offset Voltage: 500 V max
Low Input Voltage Noise: 2 V p-p
High Open Loop Gain
Low Quiescent Current: 2.8 mA max
Low Total Harmonic Distortion
Standard Dual Amplifier Pin Out
Available in Hermetic Metal Can Package and Chip Form
MIL-STD-883B Processing Available
Single Version Available: AD542
The AD642 is available in four versions: the ‘‘J’’, ‘‘K’’ and ‘‘L,’’
all specified over the 0 C to +70 C temperature range and one
PRODUCT HIGHLIGHTS
1. The AD642 has tight matching specifications to ensure high
2. Analog Devices, unlike some manufacturers, specifies each
3. Laser-wafer-trimming reduces offset voltage to as low as
4. Low voltage noise (2 V, p-p), and high open loop gain
5. The standard dual amplifier pin out allows the AD642 to
6. The AD642 is available in chip form.
version, ‘‘S,’’ over the –55 C to +125 C extended operating
temperature range. All devices are packaged in the hermetically-
sealed, TO-99 metal can or available in chip form.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
performance, eliminating the need to match individual
devices.
device for the maximum bias current at either input in the
warmed-up condition, thus assuring the user that the AD642
will meet its published specifications in actual use.
(AD642L), thus eliminating the need for external nulling.
enhance the AD642’s performance as a precision op amp.
replace lower performance duals without redesign.
0.5 mV max and matched side to side to 0.25 mV
PIN CONFIGURATION
Precision, Low Cost
Dual BiFET Op Amp
AD642
Fax: 617/326-8703

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AD642 Summary of contents

Page 1

... FET input operational amplifiers max matched for the AD642K and max, matched for the AD642J and S. In addition, the offset voltage is laser trimmed to less than 0.5 mV and matched to 0.25 mV for the AD642L, 1.0 mV and matched to 0.5 mV for the AD642K, utilizing Analog’ ...

Page 2

... AD642JH AD642KH = + 0.100 (2.54) 0.160 (4.06) BSC 0.110 (2.79 0.045 (1.14) 0.027 (0.69 0.034 (0.86) 0.027 (0.69) 45 BSC –2– AD642L AD642S Min Typ Max Min Typ Max 250,000 250,000 250,000 100,000 1.0 1 2.0 3.0 2.0 3.0 0.5 1.0 1.0 3.5 100 100 ...

Page 3

... Figure 4. Quiescent Current vs. Supply Voltage Figure 7. Input Bias Current vs. CMV Figure 10. Open Loop Frequency Response REV. 0 REV. 0 Typical Characteristics–AD642 Figure 2. Output Voltage Swing vs. Supply Voltage Figure 5. Input Bias Current vs. Power Supply Voltage Figure 8. Change in Offset vs. Warm-Up Time Figure 11. Open Loop Voltage Gain vs. Supply Voltage – ...

Page 4

... AD642 Figure 13. Common-Mode Rejection Ratio vs. Frequency Figure 16. Total Harmonic Distortion vs. Frequency a. Unity Gain Follower Figure 19 Test Circuits Figure 21a. Unity Gain Follower Pulse Response (Large Signal) Figure 22a. Unity Gain Inverter Figure 14. Large Signal Frequency Response Figure 17. Input Noise Voltage Spectral Density b ...

Page 5

... Typically this noise is not important above 10 Hz, but it can be important for low fre- quency-high gain applications. The low noise characteristic of the AD642 make it ideal for 1/f noise testing circuits. The circuit of Figure 0 bandpass filter with second order filter characteristics. ...

Page 6

... AD642 make it suitable for wide dynamic range log amplifiers. Figure schematic of a log ratio circuit employing the AD642 that can achieve less than 1% conformance error over 5 decades of current input 100 A. For voltage inputs, the dynamic range is typically for 1% error limited on the low end by the amplifier’ ...

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