BR35H160-WC ROHM Co. Ltd., BR35H160-WC Datasheet - Page 13

• Manufacturer Part Number: BR35H160-WC
• Description: Automotive Serial Eeproms
• Manufacturer: ROHM Co. Ltd.

●Notes on power ON/OFF
●Noise countermeasures
© 2011 ROHM Co., Ltd. All rights reserved.
BR35H□□□-WC Series
www.rohm.com
○At power ON/OFF set CSB=”H” (=Vcc).
○LVCC circuit
○P.O.R. circuit
○Vcc noise (bypass capacitor)
○SCK noise
When CSB is “L”, the IC goes into input accept status (active). If power is turned on in this status noises, etc. may cause
malfunction or erroneous write. To prevent this, set CSB to “H” at power ON. (When CSB is in “H” status, all inputs are
canceled.)
(Good example) CSB terminal is pulled up to Vcc.
(Bad example) CSB terminal is “L” at power ON/OFF.
LVCC (Vcc-Lockout) circuit prevents data rewrite action at low power and prevents erroneous write.
At LVCC voltage (Typ. =1.9V) or below, it prevents data rewrite.
This IC has a POR (Power On Reset) circuit as countermeasure against erroneous write. After the POR operation is
performed, write disable status is entered. The POR circuit is only valid when power is ON and does not work when
power is OFF. When power is ON and the following recommended tR, tOFF, Vbot conditions are not satisfied, write
enable status might be entered due to noise etc.
When noise or surge gets in the power source line, malfunction may occur. To prevent this, it is recommended to attach a
bypass capacitor (0.1μF) between IC Vcc and GND, as close to IC as possible.
It is also recommended to attach a bypass capacitor between the board Vcc and GND.
When the rise time of SCK (tRC) is long and a there is a certain degree of noise, malfunction may occur due to clock bit
displacement. To avoid this, a Schmitt trigger circuit is built in the SCK input. The hysteresis width of this circuit is set to
about 0.2V. If noises exist at the SCK input set the noise amplitude to 0.2Vp-p or below. Also, it is recommended to set
the rise time of SCK (tRC) to 100ns or below. In case the rise time is 100ns or higher, sufficient noise countermeasures
are needed. Clock rise, fall time should be as small as possible.
This can even occur when CSB input is High-Z.
After turning power off allow for 10ms or more before turning power on again. If power is turned on without observing
this condition, the IC internal circuit may not be reset.
In this case, CSB always becomes “L” (active status), and the EEPROM may malfunction or perform an erroneous
write due to noises, etc.
Vcc
0
Fig.52 Rise waveform
tOFF
Fig.51
Vcc
CSB
GND
Vcc
tR
CSB timing at power ON/OFF
Vbot
Good
example
Bad
example
13/16
100ms or below
10ms or below
tR
Recommended conditions for t
10ms or higher
10ms or higher
tOFF
R
, t
0.3V or below
0.2V or below
Technical Note
2011.03 - Rev.C
OFF
, Vbot
Vbot