TS2GCF300 Transcend Information. Inc., TS2GCF300 Datasheet - Page 25

• Manufacturer Part Number: TS2GCF300
• Description: 300x Compactflash Card
• Manufacturer: Transcend Information. Inc.

T
Notes: All timings are in nanoseconds. The maximum load on -IOCS16 is 1 LSTTL with a 50 pF (40pF below 120nsec Cycle Time) total
Transcend Information Inc.
T
T
S
S
S
4
4
4
True IDE PIO Mode Read/Write Timing Specification
load. All times are in nanoseconds. Minimum time from -IORDY high to -IORD high is 0 nsec, but minimum -IORD width shall still
be met.
1) t0 is the minimum total cycle time, t2 is the minimum command active time, and t2i is the minimum command recovery time or
2) This parameter specifies the time from the negation edge of -IORD to the time that the data bus is no longer driven by the
3) The delay from the activation of -IORD or -IOWR until the state of IORDY is first sampled. If IORDY is inactive then the host
4) t7 and t8 apply only to modes 0, 1 and 2. For other modes, this signal is not valid.
5) IORDY is not supported in this mode.
G
G
G
command inactive time. The actual cycle time equals the sum of the actual command active time and the actual command
inactive time. The three timing requirements of t0, t2, and t2i shall be met. The minimum total cycle time requirement is greater
than the sum of t2 and t2i. This means a host implementation can lengthen either or both t2 or t2i to ensure that t0 is equal to
or greater than the value reported in the device’s identify device data. A CompactFlash Storage Card implementation shall
support any legal host implementation.
CompactFlash Storage Card (tri-state).
shall wait until IORDY is active before the PIO cycle can be completed. If the CompactFlash Storage Card is not driving
IORDY negated at tA after the activation of -IORD or -IOWR, then t5 shall be met and tRD is not applicable. If the
CompactFlash Storage Card is driving IORDY negated at the time tA after the activation of -IORD or -IOWR, then tRD shall be
met and t5 is not applicable.
~
~
~
1
1
1
T6Z
tRD
6
t2i
tC
tA
tB
6
t0
t1
t2
t2
t3
t4
t5
t6
t7
t8
t9
6
G
G
G
C
C
C
Cycle time (min)
Address Valid to -IORD/-IOWR
setup (min)
-IORD/-IOWR (min)
-IORD/-IOWR recovery time (min)
-IOWR data setup (min)
-IOWR data hold (min)
-IORD data setup (min)
-IORD data hold (min)
-IORD data tristate (max)
Address valid to -IOCS16 assertion
(max)
Address valid to -IOCS16 released
(max)
-IORD/-IOWR to address valid hold
Read Data Valid to IORDY active
(min), if IORDY initially low after tA
IORDY Setup time
IORDY Pulse Width (max)
IORDY assertion to release (max)
-IORD/-IOWR (min) Register (8 bit)
F
F
F
3
3
3
0
0
0
0
0
0
Item
1250
600
165
290
70
60
30
50
30
90
60
20
35
5
5
0
0
-
25
1
1250
383
125
290
50
45
20
35
30
50
45
15
35
5
0
5
-
1250
240
100
290
30
30
15
20
30
40
30
10
35
2
5
0
5
-
Mode
1250
180
n/a
n/a
80
80
10
30
10
30
70
30
20
35
3
5
0
5
1250
120
n/a
n/a
25
70
70
25
20
10
20
30
10
35
5
4
5
0
300X CompactFlash Card
100
na
na
n/a
n/a
na
15
65
65
20
15
20
10
25
5
5
5
0
5
5
5
n/a
n/a
na
na
na
55
55
10
80
10
20
15
10
20
6
5
5
0
5
5
5
Note
1
1
1
1
2
4
4
3