74F161APC Fairchild Semiconductor, 74F161APC Datasheet

Page 1

... M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74F161ASJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F161APC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 74F163ASC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow ...

Page 2

Logic Symbols 74F161A IEEE/IEC 74F161A Unit Loading/Fan Out Pin Names CEP Count Enable Parallel Input CET Count Enable Trickle Input CP Clock Pulse Input (Active Rising Edge) MR (74F161A) Asynchronous Master Reset Input (Active LOW) SR (74F163A) Synchronous Reset Input ...

Page 3

Functional Description The 74F161A and 74F163A count in modulo-16 binary sequence. From state 15 (HHHH) they increment to state 0 (LLLL). The clock inputs of all flip-flops are driven in paral- lel through a clock buffer. Thus all changes of ...

Page 4

Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 3) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...

Page 5

AC Electrical Characteristics Symbol Parameter f Maximum Count Frequency MAX t Propagation Delay PLH (PE Input HIGH) PHL n t Propagation Delay PLH (PE Input LOW) PHL n t Propagation Delay PLH ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M16A Package Number M16D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...