74F164A Fairchild Semiconductor, 74F164A Datasheet - Page 2

• Manufacturer Part Number: 74F164A
• Description: Serial-In/ Parallel-Out Shift Register
• Manufacturer: Fairchild Semiconductor

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Unit Loading/Fan Out
Functional Description
The 74F164A is an edge-triggered 8-bit shift register with
serial data entry and an output from each of the eight
stages. Data is entered serially through one of two inputs
(A or B); either of these inputs can be used as an active
HIGH Enable for data entry through the other input. An
unused input must be tied HIGH.
Each LOW-to-HIGH transition on the Clock (CP) input
shifts data one place to the right and enters into Q
ical AND of the two data inputs (A • B) that existed before
the rising clock edge. A LOW level on the Master Reset
(MR) input overrides all other inputs and clears the register
asynchronously, forcing all Q outputs LOW.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names
A, B
CP
MR
Q
0
–Q
7
Data Inputs
Clock Pulse Input (Active Rising Edge)
Master Reset Input (Active LOW)
Outputs
Description
0
the log-
2
Mode Select Table
H(h)
L(l)
X
q
one setup time prior to the LOW-to-HIGH clock transition.
n
Immaterial
Lower case letters indicate the state of the referenced input or output
LOW Voltage Levels
HIGH Voltage Levels
Reset (Clear)
Shift
Operating
Mode
HIGH/LOW
50/33.3
1.0/1.0
1.0/1.0
1.0/1.0
U.L.
MR
H
H
H
H
L
Inputs
A
X
h
h
l
l
Output I
20 A/ 0.6 mA
20 A/ 0.6 mA
20 A/ 0.6 mA
Input I
1 mA/20 mA
B
X
h
h
l
l
IH
OH
Q
H
L
L
L
L
/I
0
/I
Outputs
IL
OL
Q
q
q
q
q
1
L-L
0
0
0
0
–Q
–q
–q
–q
–q
6
6
6
6
7