ST7565 Sitronix Technology, ST7565 Datasheet - Page 33

• Manufacturer Part Number: ST7565
• Description: 65 x 132 Dot Matrix LCD Controller/Driver
• Manufacturer: Sitronix Technology

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ST7565
Column Address Set
This command specifies the column address of the display data RAM shown in Figure 4. The column address is split into two
sections (the higher 4 bits and the lower 4 bits) when it is set (fundamentally, set continuously). Each time the display data RAM
is accessed, the column address automatically increments (+1), making it possible for the MPU to continuously read from/write
to the display data. The column address increment is topped at 83H. This does not change the page address continuously. See
the function explanation in “The Column Address Circuit,” for details.
Status Read
Display Data Write
This command writes 8-bit data to the specified display data RAM address. Since the column address is automatically
incremented by “1” after the write, the MPU can write the display data.
Ver 1.0a
A0
0
A0
1
ON/OFF
RESET
BUSY
High bits →
Low bits →
ADC
/RD / WR
E
1
/RD
0
E
BUSY = 1: it indicates that either processing is occurring internally or a reset condition is in process.
BUSY = 0: A new command can be accepted . if the cycle time can be satisfied, there is no need to check
This shows the relationship between the column address and the segment driver.
ON/OFF: indicates the display ON/OFF state.
This indicates that the chip is in the process of initialization either because of a /RES signal or because of a
reset command.
R/W
0
R/W
1
/WR
0: Reverse (column address 131-n ↔ SEG n)
1: Normal (column address n ↔ SEG n)
(The ADC command switches the polarity.)
0: Display ON
1: Display OFF
(This display ON/OFF command switches the polarity.)
0: Operating state
1: Reset in progress
A0
0
D7 D6 D5 D4 D3 D2 D1 D0
for BUSY conditions.
/RD /WR D7 D6 D5 D4 D3 D2 D1 D0 A7 A6 A5 A4 A3 A2 A1 A0
1
E
BUSY
R/W
Write data
D7
0
0
ADC
D6
0
ON/OFF RESET
0
D5
1
0 A3 A2
A7 A6
D4
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D3 D2 D1 D0
0
A5 A4
A1 A0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
↓
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
1
0
0
1
2002/06/24
Column
address
130
131
↓
0
1
2