IDT5V991A-5 Integrated Device Technology, IDT5V991A-5 Datasheet

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IDT5V991A-5

Manufacturer Part Number
IDT5V991A-5
Description
3.3v Programmable Skew Pll Clock Driver Turboclock
Manufacturer
Integrated Device Technology
Datasheet

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FEATURES:
• REF is 5V tolerant
• 4 pairs of programmable skew outputs
• Low skew: 200ps same pair, 250ps all outputs
• Selectable positive or negative edge synchronization:
• Synchronous output enable
• Output frequency: 3.75MHz to 85MHz
• 2x, 4x, 1/2, and 1/4 outputs
• 3 skew grades:
• 3-level inputs for skew and PLL range control
• PLL bypass for DC testing
• External feedback, internal loop filter
• 12mA balanced drive outputs
• Low Jitter: <200ps peak-to-peak
• Available in 32-pin PLCC Package
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT5V991A
3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
c
IDT5V991A-2: t
IDT5V991A-5: t
IDT5V991A-7: t
Excellent for DSP applications
2001
Integrated Device Technology, Inc.
SKEW0
SKEW0
SKEW0
<250ps
<500ps
<750ps
REF
FB
V
CCQ
PLL
3.3V PROGRAMMABLE
SKEW PLL CLOCK DRIVER
TURBOCLOCK™
FS
3
/PE
3
3
3
3
Select
Select
Select
Select
Skew
Skew
Skew
Skew
1
GND/sOE
DESCRIPTION:
for high performance computing and data-communications applications. A
key feature of the programmable skew is the ability of outputs to lead or lag
the REF input signal. The IDT5V991A has eight programmable skew
outputs in four banks of 2. Skew is controlled by 3-level input signals that
may be hard-wired to appropriate HIGH-MID-LOW levels.
enabled. However, if GND/sOE is held high, all the outputs except 3Q0 and
3Q1 are synchronously disabled.
synchronized with the positive edge of the REF clock input. When V
PE is held low, all the outputs are synchronized with the negative edge of
REF. Both devices have LVTTL outputs with 12mA balanced drive outputs.
3
3
3
3
The IDT5V991A is a high fanout 3.3V PLL based clock driver intended
When the GND/sOE pin is held low, all the outputs are synchronously
Furthermore, when the V
1F1:0
2F1:0
3F1:0
4F1:0
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
CCQ
1Q
1Q
2Q
2Q
3Q
3Q
4Q
4Q
0
1
0
1
0
1
0
1
/PE is held high, all the outputs are
SEPTEMBER 2001
IDT5V991A
DSC 5963/3
CCQ
/

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IDT5V991A-5 Summary of contents

Page 1

... Excellent for DSP applications • Synchronous output enable • Output frequency: 3.75MHz to 85MHz • 2x, 4x, 1/2, and 1/4 outputs • 3 skew grades: IDT5V991A-2: t <250ps SKEW0 IDT5V991A-5: t <500ps SKEW0 IDT5V991A-7: t <750ps SKEW0 • 3-level inputs for skew and PLL range control • PLL bypass for DC testing • ...

Page 2

... IDT5V991A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK PIN CONFIGURATION /PE CCQ PLCC TOP VIEW PIN DESCRIPTION Pin Name Type Description REF I N Reference Clock Input ...

Page 3

... IDT5V991A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK EXTERNAL FEEDBACK By providing external feedback, the IDT5V991A gives users flexibility with regard to skew adjustment. The FB signal is compared with the input REF signal at the phase detector in order to drive the VCO. Phase differences cause the VCO of the PLL to adjust upwards or downwards accordingly ...

Page 4

... H R Reference Clock Input EF NOTE: 1. Where pulse width implied less than t H COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES IDT5V991A-2, -5, -7 Min. 3 -40 Conditions Guaranteed Logic HIGH (REF, FB Inputs Only) Guaranteed Logic LOW (REF, FB Inputs Only) 3-Level Inputs Only 3-Level Inputs Only ...

Page 5

... U = 0pF; for C = 30pF 0.35ns Max. L SKEW0 delay), Inverted (4Q and 4Q only with within specified limits IDT5V991A-5 IDT5V991A-7 Min. Typ. Max. Min. Typ. 3 — — 3 — 3 — — 3 — See Control Summary Table — ...

Page 6

... IDT5V991A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK AC TEST LOADS AND WAVEFORMS COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES Ω 150 O utput Ω 150 Test Load t OR ISE LVTTL Output Waveform ≤ 1ns 3.0V 2.0V Vth = 1.5V 0.8V 0V LVTTL Input Test Waveform 6 20pF t O FALL ≤ ...

Page 7

... IDT5V991A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK AC TIMING DIAGRAM IVID IVID NOTES: V /PE: The AC Timing Diagram applies to V CCQ CCQ negative edge of REF, and the positive edges of the divide-by-2 and the divide-by-4 signals align. ...

Page 8

... IDT5V991A 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK ORDERING INFORMATION XXXXX XX X IDT Package Process Device Type CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES Blank Commercial (0°C to +70°C) I Industrial (-40°C to +85°C) Rectangular Plastic Leaded Chip Carrier ...

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