IDT71P71804 Integrated Device Technology, IDT71P71804 Datasheet - Page 11
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IDT71P71804
Manufacturer Part Number
IDT71P71804
Description
1.8v 1m X 18 Ddr Ii Pipelined Sram
Manufacturer
Integrated Device Technology
Datasheet
1.IDT71P71804.pdf
(23 pages)
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Quantity
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Manufacturer:
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Manufacturer:
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Quantity:
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Overshoot Timing
Input Electrical Characteristics Over the Operating Temperature and
Supply Voltage Range
NOTES:
1. These are DC test criteria. DC design criteria is V
2. V
3. V
4. This conditon is for AC function test only, not for AC parameter test.
5. To maintain a valid level, the transitioning edge of the input must:
V
V
Input High Voltage, DC
Input Low Voltage, DC
Input High Voltage, AC
Input Low Voltage, AC
IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit)
18 Mb DDR II SRAM Burst of 2
DD
DD
a) Sustain a constant slew rate from the current AC level through the target AC level, V
b) Reach at leaset the target AC level.
c) After the AC target level is reached, continue to maintain at least the target DC level, V
IL
IH
+0.5
+0.25
V
(Min) DC = -0.3V, V
(Max) DC = V
V
DD
IL
PARAMETER
DDQ
+0.3, V
IL
(Min) AC = -0.5V (pulse width <20% tKHKH (min))
IH
20% tKHKH (MIN)
(Max) AC = V
SYMBOL
V
V
V
V
IH (DC
IH (AC)
IL (DC)
IL (AC)
)
DD
(V
+0.5V (pulse width <20% tKHKH (min))
DD
REF
V
= 1.8 ± 100mV, V
V
+ 50mV. The AC V
REF
REF
MIN
-0.3
-
+0.2
+0.1
6112 drw 21
IH
DDQ
V
/V
V
V
6.42
DDQ
11
REF
IL
REF
MAX
levels are defined separately for measuring timing parameters.
= 1.4V to 1.9V)
-
Undershoot Timing
V
+0.3
-0.2
-0.1
V
SS
SS
-0.25V
-0.5V
IL
IL
V
V
(AC) or V
(DC) or V
SS
IH
IH
IH
(AC)
UNIT
(DC)
V
V
V
V
20% tKHKH (MIN)
NOTES
Commercial Temperature Range
1,2
1,3
4,5
4,5
6112 tbl 10d
6112 drw 22