IDT71216 Integrated Device Technology, IDT71216 Datasheet
IDT71216
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IDT71216 Summary of contents
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... Match and Read operations are both asynchronous in order to provide the fastest access times possible, while Write operations are synchronous for ease of system timing. The IDT71216 uses a 5V power supply on Vcc, with separate V ance with both 5.0V TTL and 3.3V LVTTL Logic levels. The PWRDN power consumption by 90%, providing significant system power savings ...
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... IDT71216 BiCMOS 16K x 15 CACHE-TAG RAM PIN CONFIGURATION DTY / COMMERCIAL TEMPERATURE RANGE PN80-1 TQFP TOP VIEW 14 TAG8 TAG7 TAG6 VLD ...
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... IDT71216 BiCMOS 16K x 15 CACHE-TAG RAM FUNCTIONAL BLOCK DIAGRAM ADDR (0:13) Reg CS1 CS2 Reg TAG (0:11) OET WRITE (pos) PULSE GENERATOR WET Reg WES CLK RESET (neg) PULSE GENERATOR RESET PWRDN SFUNC TT1 TAH TAIN Reg TAOE 0 16K x 12 MEMORY 1 TAG BITS ...
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... IDT71216 BiCMOS 16K x 15 CACHE-TAG RAM TRUTH TABLES CHIP SELECT, RESET, AND POWER-DOWN FUNCTIONS CS1 RESET RESET PWRDN WET WES WET CS1 PWRDN CS2 CLK CHIP SELECT FUNCTION RESET FUNCTION ...
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... IDT71216 BiCMOS 16K x 15 CACHE-TAG RAM TRUTH TABLES (CONT.) ( MATCH FUNCTION CS1 CS1 OET WET OET WET WES WES CS2 SFUNC ...
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... IDT71216 BiCMOS 16K x 15 CACHE-TAG RAM RECOMMENDED DC OPERATING CONDITIONS Symbol Parameter Min. V Supply Voltage 4. Output Buffers 4.75 CCQ V 3.3V Output Buffers 3.0 CCQ V Supply Ground Input High Voltage 2 I/O High Voltage 2.2 IHQ V Input Low Voltage –0.5 IL NOTE (min.) = –1.5V for pulse width of less than 10ns, once per cycle. ...
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... LOW 90 — — — — — — 50 LOW 5 — WES Active 50 — 14.3 COMMERCIAL TEMPERATURE RANGE IDT71216S10 IDT71216S12 Max. Min. Max. Min. — 11 — 12 — — 9 — 10 — 1 — 1 — — 6 — 6 — ...
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... TA Invalid — 6 1.5 — — 9 — — LOW 5 — WES Active 50 — 14.3 COMMERCIAL TEMPERATURE RANGE IDT71216S9 IDT71216S10 IDT71216S12 Min. Max. Min. Max. Min. Max. Unit 15 — 15 — 16.6 4.5 — 4.5 — 5 4.5 — 4.5 — — 3 — — 1 — — ...
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... LOW — 6 Valid — 6 Invalid — Valid — 7 — 6 — Invalid — Valid — 8 14.3 COMMERCIAL TEMPERATURE RANGE IDT71216S9 IDT71216S10 IDT71216S12 Min. Max. Min. Max. Min. — 9 — 10 — — 9 — 10 — — 9 — 10 — 1 — 1 — ...
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... IDT71216 BiCMOS 16K x 15 CACHE-TAG RAM AC TEST CONDITIONS Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Timing Reference Levels AC Test Load AC TEST LOADS V CCQ Outputs 347 Figure 1. AC Test Load Tag I/O and Outputs 347 Figure 3. AC Test Load ...
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... IDT71216 BiCMOS 16K x 15 CACHE-TAG RAM TIMING WAVEFORMS OF WRITE AND READ CYCLES COMMERCIAL TEMPERATURE RANGE 14.3 11 ...
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... IDT71216 BiCMOS 16K x 15 CACHE-TAG RAM TIMING WAVEFORMS OF MATCH AND TA TA FUNCTIONS 14.3 COMMERCIAL TEMPERATURE RANGE 12 ...
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... IDT71216 BiCMOS 16K x 15 CACHE-TAG RAM RESET RESET TIMING WAVEFORMS OF CLK t SR RESET t PDSR PWRDN VLD OUT DTY OUT WT OUT t S WES WET TA MATCH TAG (0:11) NOTE: 1. Transition is measured 200mV from steady state. CLOCK TIMING WAVEFORM t CH CLK 2.0V 2. TIMING WAVEFORMS OF Applies when SFUNC is LOW, and the internal WT bit is HIGH ...
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... IDT71216 BiCMOS 16K x 15 CACHE-TAG RAM OES OES TIMING WAVEFORMS OF OES VLD OUT DTY OUT Valid Output WT OUT NOTE: 1. Transition is measured 200mV from steady state. TIMING WAVEFORMS OF POWER DOWN FUNCTION PWRDN t WHPL CLK t RHPL RESET t S WET WES , TAG (0:10) VLD OUT ...