IDT72T51256 Integrated Device Technology, IDT72T51256 Datasheet

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IDT72T51256

Manufacturer Part Number
IDT72T51256
Description
2.5v Multi-queue Flow-control Devices 4 Queues 36 Bit Wide Configuration 589,824 Bits, 1,179,648 Bits And 2,359,296 Bits
Manufacturer
Integrated Device Technology
Datasheet
!2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
FEATURES:
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FUNCTIONAL BLOCK DIAGRAM
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
Choose from among the following memory density options:
IDT72T51236
IDT72T51246
IDT72T51256
Configurable from 1 to 4 Queues
Queues may be configured at master reset from the pool of
Total Available Memory in blocks of 256 x 36
Independent Read and Write access per queue
User programmable via serial port
User selectable I/O: 2.5V LVTTL, 1.5V HSTL, 1.8V eHSTL
Default multi-queue device configurations
-IDT72T51236: 4,096 x 36 x 4Q
-IDT72T51246: 8,192 x 36 x 4Q
-IDT72T51256: 16,384 x 36 x 4Q
100% Bus Utilization, Read and Write on every clock cycle
200 MHz High speed operation (5ns cycle time)
3.6ns access time
Echo Read Enable & Echo Read Clock Outputs
Individual, Active queue flags (OV, FF, PAE, PAF, PR)
x9, x18, x36
DATA IN
WADEN
FSTR
WRADD
WEN
WCLK
PAFn
FF
PAF
# # # # #
# # # # #
# # # # #
5
D in
4
Total Available Memory = 589,824 bits
Total Available Memory = 1,179,648 bits
Total Available Memory = 2,359,296 bits
MULTI-QUEUE FLOW-CONTROL DEVICE
2.5V MULTI-QUEUE FLOW-CONTROL DEVICES
(4 QUEUES) 36 BIT WIDE CONFIGURATION
589,824 bits, 1,179,648 bits and 2,359,296 bits
Q0
Q3
1
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4 bit parallel flag status on both read and write ports
Provides continuous PAE and PAF status of up to 4 Queues
Global Bus Matching - (All Queues have same Input Bus Width
and Output Bus Width)
User Selectable Bus Matching Options:
- x36in to x36out
- x18in to x36out
- x9in to x36out
- x36in to x18out
- x36in to x9out
FWFT mode of operation on read port
Packet mode operation
Partial Reset, clears data in single Queue
Expansion of up to 8 multi-queue devices in parallel is available
Power Down Input provides additional power savings in HSTL
and eHSTL modes.
JTAG Functionality (Boundary Scan)
Available in a 256-pin PBGA, 1mm pitch, 17mm x 17mm
HIGH Performance submicron CMOS technology
Industrial temperature range (-40°C to +85°C) is available
6116 drw01
ADVANCE INFORMATION
Q out
NOVEMBER 2003
4
ERCLK
PAEn
5
EREN
PRn
PAE
RDADD
RADEN
x9, x18, x36
DATA OUT
OV
PR
ESTR
RCLK
REN
OE
IDT72T51236
IDT72T51246
IDT72T51256
DSC-6116/2

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IDT72T51256 Summary of contents

Page 1

... Default multi-queue device configurations " " " " " -IDT72T51236: 4,096 -IDT72T51246: 8,192 -IDT72T51256: 16,384 100% Bus Utilization, Read and Write on every clock cycle " " " " " 200 MHz High speed operation (5ns cycle time) " ...

Page 2

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits DESCRIPTION: The IDT72T51236/72T51246/72T51256 multi-queue flow-control de- vices are single chip within which anywhere between 1 and 4 discrete FIFO queues can be setup. All ...

Page 3

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits WCLK WEN 5 WRADD Write Control Logic WADEN Write Pointers PAF FSTR 4 General Flag PAFn Monitor FSYNC FXO FXI FF Active Q Flags ...

Page 4

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits PIN CONFIGURATION A1 BALL PAD CORNER A D14 D13 D12 D10 B D15 D16 D11 D9 C D17 D18 D19 D20 ...

Page 5

... Also the total size of any given queue must be in increments of 256 x36. For the IDT72T51236/ 72T51246 and IDT72T51256 the Total Available Memory is 64, 128 and 256 blocks respectively (a block being 256 x36). Queues can be built from these blocks to make any size queue desired and any number of queues desired ...

Page 6

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits EXPANSION Expansion of multi-queue devices is also possible devices can be connected in a parallel fashion providing the possibility of both ...

Page 7

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits PIN DESCRIPTIONS Symbol & Name I/O TYPE Pin No. BM Bus Matching LVTTL (L14) INPUT D[35:0] Data Input Bus HSTL-LVTTL These are the 36 ...

Page 8

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. (1) FM Flag Mode HSTL-LVTTL This pin is setup before a master reset and ...

Page 9

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. OE Output Enable HSTL-LVTTL The Output enable signal is an Asynchronous signal used to ...

Page 10

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. (1) PKT Packet Mode LVTTL (Continued) INPUT PR Packet Ready HSTL-LVTTL If packet mode ...

Page 11

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. REN HSTL-LVTTL The REN input enables read operations from a selected queue based on ...

Page 12

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. WADEN Write Address HSTL-LVTTL The WADEN input is used in conjunction with WCLK and ...

Page 13

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits PIN NUMBER TABLE Symbol Name I/O TYPE D[35:0] Data Input Bus HSTL-LVTTL D35-J3, D(34-32)-H(3-1), D(31-29)-G(3-1), D(28-26)-F(3-1), D(25-23)-E(3-1), D(22-20)-D(3-1), Din INPUT Q[35:0] Data Output Bus ...

Page 14

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits ABSOLUTE MAXIMUM RATINGS Symbol Rating V Terminal Voltage TERM with respect to GND T Storage Temperature STG I DC Output Current OUT NOTES: 1. ...

Page 15

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits DC ELECTRICAL CHARACTERISTICS (Commercial 2.5V ± 0.125V 0$C to +70$C;Industrial Symbol Parameter I Input Leakage Current LI ...

Page 16

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits HSTL 1.5V AC TEST CONDITIONS Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels NOTE 1.5V±. DDQ ...

Page 17

... Industrial temperature range product for the 6ns is available as a standard device. All other speed grades available by special order. 2. Values guaranteed by design, not currently tested. = 2.5V ± 0.15V -40$C to +85$C; JEDEC JESD8-A compliant Commercial Com'l & Ind'l IDT72T51236L5 IDT72T51236L6 IDT72T51246L5 IDT72T51246L6 IDT72T51256L5 IDT72T51256L6 Min. Max. Min. — 200 — 0.6 3.6 0.6 5 — 6 2.3 — ...

Page 18

... Industrial temperature range product for the 6ns is available as a standard device. All other speed grades available by special order. 2. Values guaranteed by design, not currently tested. = 2.5V ± 0.15V -40$C to +85$C; JEDEC JESD8-A compliant Commercial Com'l & Ind'l IDT72T51236L5 IDT72T51236L6 IDT72T51246L5 IDT72T51246L6 IDT72T51256L5 IDT72T51256L6 Min. Max. Min. — 4.0 — — 3.6 — 0.6 3.6 0.6 ...

Page 19

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits FUNCTIONAL DESCRIPTION MASTER RESET A Master Reset is performed by toggling the MRS input from HIGH to LOW to HIGH. During a master reset ...

Page 20

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits cycles are required for the device to load its internal setup registers. When a single multi-queue device is used, the completion of device programming ...

Page 21

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits READ QUEUE SELECTION AND READ OPERATION (STANDARD MODE) The IDT72T51236/72T51246/72T51256 multi-queue flow-control devices can be configured maximum of 8 queues which ...

Page 22

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits WRITE QUEUE SELECTION AND WRITE OPERATION (PACKET MODE required that a full packet be written to a queue before moving to a ...

Page 23

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits TABLE 5 — PACKET MODE VALID BYTE TMOD1 (D33) RMOD1 (Q33) NOTE: Packet Mode is only available when the Input Port and Output Port ...

Page 24

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits queues such that during a queue switch, the last data word required from the previous queue will fall through the pipeline to the output. ...

Page 25

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits newly selected queue. On the third rising edge of WCLK following the queue selection, data can be written into the newly selected queue provided ...

Page 26

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits via the serial port or one of the default values (8 or 128) can be selected if the user has performed default programming. As ...

Page 27

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits TABLE 4 — FLAG OPERATION BOUNDARIES & TIMING Output Valid, OV Flag Boundary I/O Set-Up OV Goes LOW after 1 In36 to out36 (Almost ...

Page 28

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits TABLE 4 — FLAG OPERATION BOUNDARIES & TIMING (CONTINUED) Programmable Almost Empty Flag, PAE Boundary I/O Set-Up in36 to out36 (Both ports selected for ...

Page 29

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits PAFn BUS EXPANSION - DIRECT MODE LOW at Master Reset then the PAFn bus operates in Direct (addressed) mode. In direct ...

Page 30

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits ECHO READ CLOCK (ERCLK) The Echo Read Clock output is provided in both HSTL and LVTTL mode, selectable via IOSEL. The ERCLK is a ...

Page 31

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits BYTE ORDER ON INPUT PORT: BYTE ORDER ON OUTPUT PORT ...

Page 32

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits MRS t RSS WEN REN t RSS SENI t RSS FSTR, ESTR t RSS WADEN, RADEN t RSS ID0, ID1, ID2 t RSS OW, ...

Page 33

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits w-3 WCLK WADEN WEN WRADD Qx FF PAF Active Bus PAF-Qx (5) PRS RCLK REN t ...

Page 34

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits COMMERCIAL AND INDUSTRIAL 34 TEMPERATURE RANGES ...

Page 35

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits COMMERCIAL AND INDUSTRIAL 35 TEMPERATURE RANGES ...

Page 36

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits COMMERCIAL AND INDUSTRIAL 36 TEMPERATURE RANGES ...

Page 37

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits WCLK t ENS WEN RCLK REN Qout Last Word Read Out of Queue OV NOTES has ...

Page 38

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits COMMERCIAL AND INDUSTRIAL 38 TEMPERATURE RANGES ...

Page 39

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits COMMERCIAL AND INDUSTRIAL 39 TEMPERATURE RANGES ...

Page 40

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits *A* *B* RCLK t ENS REN RDADD Addr=00111 RADEN Qout (Device 1) ...

Page 41

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits COMMERCIAL AND INDUSTRIAL 41 TEMPERATURE RANGES ...

Page 42

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits COMMERCIAL AND INDUSTRIAL 42 TEMPERATURE RANGES ...

Page 43

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits COMMERCIAL AND INDUSTRIAL 43 TEMPERATURE RANGES ...

Page 44

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits COMMERCIAL AND INDUSTRIAL 44 TEMPERATURE RANGES ...

Page 45

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits COMMERCIAL AND INDUSTRIAL 45 TEMPERATURE RANGES ...

Page 46

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits COMMERCIAL AND INDUSTRIAL 46 TEMPERATURE RANGES ...

Page 47

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits NULL QUEUE SELECT *A* RCLK t AS Don’t care RDADD t QS RADEN t AS Null-Q REN Wn-4 Q1 Wn-3 Qout ...

Page 48

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits *A* *B* WCLK WEN WRADD Addr=00110 WADEN Din PAF HIGH-Z (Device 1) ...

Page 49

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits *A* *B* RCLK REN HIGH RDADD Addr=00111 RADEN HIGH-Z Qout PAE HIGH-Z ...

Page 50

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits COMMERCIAL AND INDUSTRIAL 50 TEMPERATURE RANGES ...

Page 51

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits *A* WCLK WADEN FSTR t ENS WEN WRADD D5Q3 t 100 Wp+1 Dn ...

Page 52

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits *A* *B* RCLK RADEN ESTR REN RDADD D0Q1 000 OLZ Qout W X ...

Page 53

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits WCLK FSYNC 0 (MASTER) FXO 0 / FXI 1 FSYNC 1 (SLAVE) FXO 1 / FXI 2 FSYNC 2 (SLAVE) FXO 2 / FXI ...

Page 54

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits RCLK ESYNC 0 EXO 0 / EXI 1 ESYNC 1 EXO 1 / FXI 2 ESYNC 2 EXO 2 / EXI 0 PAE n ...

Page 55

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits WCLK WEN D[39:0] D10 D11 RCLK REN Q[39:0] ...

Page 56

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits Serial Programming Data Input Serial Enable Data Bus Write Clock Write Enable Write Queue Select Write Address Full Strobe Programmable Almost Full Full Sync1 ...

Page 57

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits JTAG INTERFACE Five additional pins (TDI, TDO, TMS, TCK and TRST) are provided to support the JTAG boundary scan interface. The IDT72T51236/72T51246/ 72T51256 incorporates ...

Page 58

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits 1 0 Input = TMS NOTES: 1. Five consecutive TCK cycles with TMS = 1 will reset the TAP. 2. TAP controller does not ...

Page 59

... IDT JEDEC ID number is 0xB3. This translates to 0x33 when the parity is dropped in the 11-bit Manufacturer ID field. For the IDT72T51236/72T51246/72T51256, the Part Number field con- tains the following values: Device Part# Field (HEX) IDT72T51236 IDT72T51246 IDT72T51256 31(MSB Version (4 bits) Part Number (16-bit) Manufacturer ID (11-bit) 0X0 0X33 ...

Page 60

IDT72T51236/72T51246/72T51256 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits HIGH-IMPEDANCE The optional High-Impedance instruction sets all outputs (including two-state as well as three-state types disabled (high-impedance) state and ...

Page 61

... Figure 36. Standard JTAG Timing JTAG AC ELECTRICAL CHARACTERISTICS ( 2.5V Parameter JTAG Clock Input Period t IDT72T51236 JTAG Clock HIGH IDT72T51246 IDT72T51256 JTAG Clock Low Min. Max. Units JTAG Clock Rise Time - 20 ns JTAG Clock Fall Time ...

Page 62

ORDERING INFORMATION IDT XXXXX X XX Device Type Power Speed NOTE: 1. Industrial temperature range product for the 6ns is available as a standard device. All other speed grades available by special order. DATASHEET DOCUMENT HISTORY 08/19/2003 pgs. 1 through ...

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