AAT1151IKS-1.0-T1 AnalogicTech, AAT1151IKS-1.0-T1 Datasheet - Page 9

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AAT1151IKS-1.0-T1

Manufacturer Part Number
AAT1151IKS-1.0-T1
Description
DC to DC Converter, 850kHz 700mA Synchronous Buck DC/DC Converter, Tape and Reel
Manufacturer
AnalogicTech
Datasheet
and provides holdup during large load transitions. A
100uF X5R or X7R ceramic capacitor provides suffi-
cient bulk capacitance to stabilize the output during
large load transitions and has ESR and ESL charac-
teristics necessary for low output ripple. The output
capacitor rms ripple current is given by
For a ceramic capacitor the ESR is so low that dis-
sipation due to the rms current of the capacitor is
not a concern. Tantalum capacitors with sufficiently
low ESR to meet output voltage ripple require-
ments also have an RMS current rating well
beyond that actually seen in this application.
1151.2003.11.0.91
I
RMS
=
2
·
1
3
·
(
V
OUT
+
V
L F V
FWD
10µF
C1
· ·
2.7V-4.2V
)
·
(
V
IN
100
IN
90
80
60
70
50
-
1
V
C2
0.1µF
100k
R2
OUT
850kHz 700mA Synchronous Buck DC/DC Converter
C1 Murata 10uF 6.3V X5R GRM42-6X5R106K6.3
C2-C5 MuRata 10uF 6.3V GRM21BR60J106KE01L
L1 Sumida CDRH3D16-4R7NC or CDRH3D16-3R3NC
)
2.7V
Efficiency vs. Load Current
R6
100k
100
R1
Load Current (mA)
10
V
Figure 1.
12
11
10
16
9
7
6
5
OUT
3.6V
AAT1151-QFN
= 1.8V
U1
Vp
Vp
Vp
Vcc
EN
gnd
n/c
gnd
Layout
Figures 2 and 3 display the suggested PCB layout
for the AAT1151. The following guidelines should
be used to help insure a proper layout.
Pgnd
Pgnd
Pgnd
Out
n/c
LX
LX
LX
4.2V
100
The input capacitor (C1) should connect as close-
ly as possible to V
C2, and L1, should be connected as closely
as possible. The connection L1 to the LX
node should be as short as possible.
The feedback trace (pin 1) should be separate
from any power trace and connect as closely as
possible to the load point. Sensing along a high
current load trace will degrade DC load regulation.
The resistance of the trace from the load return
to the PGND (pin 8) should be kept to a mini-
mum. This will help to minimize any error in DC
regulation due to differences in the potential of
the internal signal ground and the power gnd.
Low pass filter R1 and C3 provide a cleaner
bias source for the AAT1151 active circuitry.
C3 should be placed as close as possible to
SGND (pin 2) and V
4
15
14
13
8
3
2
1
3.3µH
L1
C3-C7
4x10µF
1000
1.8V
POWER
CC
(pin 4).
(pin 5) and P
AAT1151
GND
(pin 8).
9

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