IDT74FCT574 Integrated Device Technology, IDT74FCT574 Datasheet - Page 2

• Manufacturer Part Number: IDT74FCT574
• Description: Fast Cmos Octal D Registers 3-state
• Manufacturer: Integrated Device Technology

NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
2. Input and V
3. Outputs and I/O terminals only.
NOTE:
1. This parameter is measured at characterization but not tested.
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
V
V
T
T
T
P
I
C
C
OUT
Symbol
Symbol
A
BIAS
STG
TERM (2)
TERM (3)
T
IN
OUT
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability. No
terminal voltage may exceed V
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Operating Temperature
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
Input Capacitance
Output
Capacitance
CC
Parameter
GND
terminals only.
OE
D
D
D
D
D
D
D
D
Rating
4
0
1
2
3
5
6
7
CERDIP/ SOIC/ CERPACK
(1)
1
2
3
4
5
6
7
8
9
1 0
(T
TOP VIEW
SO 20-2
A
D20-1
E20-1
CC
= +25
Conditions
V
Commercial
V
by +.5V unless otherwise noted.
–55 to +125
–55 to +125
–0.5 to V
OUT
–0.5 to +7
IN
0 to +70
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
= 0V
120
0.5
= 0V
O
C, f = 1.0MHz)
CC
V
O
O
O
O
O
O
O
O
CP
Typ.
CC
–55 to +125
–65 to +135
–65 to +150
–0.5 to V
0
1
2
3
4
5
6
7
6
8
–0.5 to +7
Military
120
0.5
Max.
10
12
CC
Unit
Unit
mA
8-link
8-link
°C
°C
°C
pF
pF
W
V
V
2
1. H = HIGH Voltage Level
NOTE:
NC = No Change
INDEX
X = Don’t Care
Z = High-Impedance
Pin Names
L = LOW Voltage Level
= LOW-to-HIGH transition
Load Register
OE
D
CP
O
Function
N
N
D
D
D
D
D
MILITARY AND COMMERCIAL TEMPERATURE RANGES
Hi-Z
5
6
3
4
2
4
5
6
7
8
D Flip-Flop Data Inputs
Clock Pulse for the register. Enters data on LOW-to-HIGH
transition.
3-State Outputs (true)
Active LOW 3-state Output Enable Input
9
3
10
OE
2
H
H
H
H
L
L
TOP VIEW
L20-2
11
1
LCC
Inputs
20
12
CP
H
L
Description
13
19
18
17
16
15
14
D
X
X
H
H
L
L
N
Outputs Internal
O
O
O
O
O
O
Z
Z
H
Z
Z
L
1
2
3
4
5
N
NC
NC
Q
H
H
L
L
N