MCP2140A Microchip Technology, MCP2140A Datasheet - Page 13
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MCP2140A
Manufacturer Part Number
MCP2140A
Description
IrDA Standard Protocol Stack Controller With Fixed 9600 Baud Communication Rate
Manufacturer
Microchip Technology
Datasheet
1.MCP2140A.pdf
(60 pages)
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2.5.2
The modulated signal (data) from the IR transceiver
module (on RXIR pin) is demodulated to form the
received data (on RX pin). Once demodulation of the
data byte occurs, the data that is received is transmit-
ted by the MCP2140A UART (on the RX pin).
Figure 2-7
signal.
Each bit time is comprised of 16-bit clocks. If the value
to be received is a logic-low, the RXIR pin will be a low
level for the first 3-bit clock cycles, or a minimum of
1.6 µs. The remaining 13-bit clock cycles (or difference
up to the 16-bit clock time) will be high. If the value to
be received is a logic-high, the RXIR pin will be a high
level for the entire 16-bit clock cycles. The level on the
RX pin will be in the appropriate state for the entire 16
clock cycles.
FIGURE 2-7:
© 2007 Microchip Technology Inc.
Note:
RXIR Bit Value
RXPDREF
BITCLK
(CLK)
RXPD
RX
DECODER (DEMODULATION)
The signal on the RX pin does not actually
line up in time with the bit value that was
received on the RXIR pin, as shown in
Figure
represent the value to be transmitted on
the RX pin.
shows the decoding of the modulated
2-7. The RXIR bit value is shown to
Start Bit
16 CLK
16 CLK
DECODING
≥ 1.6 µs (up to 3 CLK)
0
Data bit 0
16 CLK
≥ 13 CLK
1
Data bit 1
16 CLK
0
Data bit 2
2.6
The baud rate for the MCP2140A IR port (the TXIR and
RXIR pins) is fixed at the default rate of 9600 baud. The
Primary device will be informed of this parameter
during NDM. The Host UART baud rate and the IR port
baud rate are the same.
16 CLK
0
IR Port Baud Rate
Data bit ...
16 CLK
1
MCP2140A
16 CLK
0
DS22050A-page 13