TDA9875A Philips Semiconductors, TDA9875A Datasheet - Page 85

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TDA9875A

Manufacturer Part Number
TDA9875A
Description
Digital TV Sound Processor DTVSP
Manufacturer
Philips Semiconductors
Datasheet

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10.4.9
This register contains, as a binary number, the highest
subaddress used for slave transmitter (status) registers.
Table 99 Subaddress 253
10.4.10 D
There will be several devices in the digital TV sound
processor family. This byte is used to identify the individual
family members.
Table 100 Subaddress 254
10.4.11 S
It is likely that during the life time of this family of devices
several versions of the DSP software will be made, e.g., to
accommodate new application concepts, respond to
customer wishes, etc. This byte is used to identify the
different releases.
Table 101 Subaddress 255
10.5
In addition to the slave receiver and slave transmitter
modes previously described, there is a special ‘expert’
mode that gives direct write access to the internal CRAM
of the DSP.
In this mode, transferred data contain 12-bit coefficients.
As these coefficients bypass on-chip coefficient look-up
tables for many functions, they directly influence the
processing of signals within the DSP.
This mode must be used with great care. It can be used to
create user-defined characteristics, such as a tone control
with different corner frequencies or special boost/cut
characteristics to correct the low-frequency loudspeaker
and/or cabinet frequency responses.
1999 Dec 20
MSB
MSB
MSB
B7
B7
B7
Digital TV Sound Processor (DTVSP)
0
0
0
Expert mode
T
B6
B6
B6
0
0
0
EST REGISTER
OFTWARE IDENTIFICATION CODE
EVICE IDENTIFICATION CODE
B5
B5
B5
0
0
0
B4
B4
B4
1
0
0
0
B3
B3
B3
0
0
0
B2
B2
B2
1
0
0
B1
B1
B1
1
1
1
LSB
LSB
LSB
B0
B0
B0
1
0
0
85
As the coefficients do not fit into one data byte, they have
to be split and arranged (see Table 104). The most
significant bit is transferred first.
The general format described in Table 104 shows the
minimum number of data bytes required, i.e. two bytes for
the transfer of a single coefficient.
Should more than one coefficient be sent, then the CRAM
address will be automatically incremented after each
coefficient, resulting in writing the sequence of coefficients
into successive memory locations, starting at
CRAM ADDRESS. A transmission can start with any valid
CRAM address. If two coefficients are to be transferred,
they are arranged as shown in Table 105.
With any odd number of coefficients to be transferred, the
least significant nibble of the last byte is regarded as
containing don’t care data.
As the transfer of coefficients cannot be accomplished
within one audio sample period, it is necessary that
received coefficients be buffered and made active all at the
same time to avoid audio signal transients. The receive
buffer is designed to store up to 8 coefficients in addition
to the CRAM address. Each byte that fits into the buffer is
acknowledged with ACK (acknowledge). If an attempt is
made to write more coefficients than the buffer can store,
the device acknowledges with NACK (not acknowledge)
and any further coefficients are ignored. Coefficients that
are already in the receive buffer remain intact.
An expert mode transfer ends when the I
condition or a repeated START condition has been
detected. Only those coefficients that have been received
during the last transmission will then be copied from the
buffer to the CRAM.
To make efficient and correct use of the expert mode, it is
recommended to transfer all coefficients for any one
function in a single transmission.
There is no checking of memory addresses and the
automatic incrementing of addresses does not stop at the
highest used CRAM address. The user of this expert mode
must be fully acquainted with the relevant procedures.
More information concerning the functions of this device,
such as the number of coefficients per function, their
default values, memory addresses, etc., can be supplied
on request at a later date.
Product specification
TDA9875A
2
C-bus STOP

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