MCP6G02 Microchip Technology, MCP6G02 Datasheet - Page 20

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MCP6G02

Manufacturer Part Number
MCP6G02
Description
110 Selectable Gain Amplifier
Manufacturer
Microchip Technology
Datasheet

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MCP6G01/2/3/4
FIGURE 4-2:
Structures.
In order to prevent damage and/or improper operation
of these amplifiers, the circuits they are in must limit the
currents (and voltages) at the V
“Absolute Maximum Ratings †” at the beginning of
Section 1.0 “Electrical Characteristics”).
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(V
R
Diode D
above V
also limits the current through D
FIGURE 4-3:
Inputs.
It is also possible to connect the diode to the left of the
resistor R
D
resistor then serves as in-rush current limiter; the DC
current into the input pin (V
A significant amount of current can flow out of the
inputs when the common mode voltage (V
ground (V
high impedance may need to limit the useable voltage
range.
DS22004A-page 20
1
1
IN
limits the possible current drawn out of the input pin.
needs to be limited by some other mechanism. The
) from going too far below ground, and the resistor
V
V
V
DD
SS
V
IN
1
1
DD
R
prevents the input pin (V
1
SS
. In this case, the current through the diode
Bond
Bond
Bond
. When implemented as shown, resistor R
1
Pad
Pad
Pad
); see
R
V
1
SS
D
1
– (minimum expected V
V
Figure
IN
Simplified Analog Input ESD
Protecting the Analog
Stage
Input
MCP6G0X
2-17. Applications that are
2 mA
IN
V
) should be very small.
DD
1
.
IN
IN
) from going too far
pins (see Section
to the rest of
the amplifier
CM
V
1
Figure 4-3
OUT
)
) is below
1
4.1.5
The maximum output voltage swing is the maximum
swing possible under a particular amplifier load current.
The amplifier load current is the sum of the external
load current (I
resistance (I
EQUATION 4-1:
FIGURE 4-4:
See
(V
load current.The specification table states the output
can reach within 10 mV of either supply rail when
R
4.2
The
(R
switches in series with the inverting input reduces the
parasitic capacitance, distortion, and gain mismatch.
R
causes additional current draw from the supplies.
When CS is high, the SGA is shut down (low power).
R
these pins and the internal amplifier’s inverting input
are all connected through R
high-Z (unlike the internal op amp).
R
R
impedance voltage source. The power supply driving
the V
0.1Ω to maintain reasonable gain accuracy.
LAD
LAD
LAD
LAD
L
DD
LAD
= 100 kΩ.
SS
Figure 2-20
is an additional load on the output of the SGA and
– V
is still attached to the V
contributes to the output noise; see
is intended to be driven at the V
= R
resistor
Where:
V
pin should have an output impedance less than
Resistor Ladder
IN
OH
Amplifier Load Current
F
RAIL-TO-RAIL OUTPUT
+ R
LAD
or V
OUT
MCP6G0X
G
); see
) sets the gain. Placing the gain
OL
I
) and the current through the ladder
LAD
ladder
for the typical output headroom
– V
Figure
Amplifier Load Current.
=
© 2006 Microchip Technology Inc.
SS
(
-------------------------------- -
) as a function of amplifier
V
OUT
shown
LAD
4-4.
V
OUT
R
SS
LAD
=
I
R
and the output is not
OUT
I
and V
V
LAD
LAD
I
OUT
SS
)
in
SS
SS
+
V
Figure
pin by a low
I
OUT
LAD
pins. Thus,
Figure 4-1
2-9.

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