NCP1216 ON, NCP1216 Datasheet - Page 13
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NCP1216
Manufacturer Part Number
NCP1216
Description
PWM Current-Mode Controller for High-Power Universal Off-Line Supplies
Manufacturer
ON
Datasheet
1.NCP1216.pdf
(18 pages)
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4. Connect an Auxiliary Winding: If the mains conditions
are such that you simply can’t match the maximum power
dissipation, then you need to connect an auxiliary winding
to permanently disconnect the startup source.
Overload Operation
controlled (e.g. wall adapters delivering raw DC level), it is
interesting to implement a true short−circuit protection. A
short−circuit actually forces the output voltage to be at a low
level, preventing a bias current to circulate in the
Optocoupler LED. As a result, the FB pin level is pulled up
to 4.2 V, as internally imposed by the IC. The peak current
setpoint goes to the maximum and the supply delivers a
rather high power with all the associated effects. Please note
that this can also happen in case of feedback loss, e.g. a
broken Optocoupler. To account for this situation, NCP1216
hosts a dedicated overload detection circuitry. Once
activated, this circuitry imposes to deliver pulses in a burst
manner with a low duty−cycle. The system auto−recovers
when the fault condition disappears.
If the fault is relaxed during the V
sequence, the IC automatically resumes.
If the fault still persists when V
controller cuts everything off until recovery.
Calculating the VCC Capacitor
depends upon the V
V
depends on the startup sequence of your system, i.e. when
CC
In applications where the output current is purposely not
As the above section describes, the fall down sequence
line to go from 12.2 V to 10 V. The required time
VCC
VCC
VCC
OFF
ON
latch
= 10 V
= 12.2 V
= 5.6 V
CC
level: how long does it take for the
12.2 V
5.6 V
10 V
Fault Flag
CC
Internal
V
Drv
CC
reached VCC
Startup Phase
CC
natural fall down
Occurs Here
Regulation
ON
NCP1216, NCP1216A
Pulses
Driver
, then the
http://onsemi.com
Figure 25.
Fault Occurs Here
Latchoff
Phase
13
maximum until the output voltage reaches its target and the
feedback loop takes over. This period of time depends on
normal output load conditions and the maximum peak
current allowed by the system. The time−out used by this IC
works with the V
V
device internally watches for an overload current situation.
If this condition is still present when the VCC
reached, the controller stops the driving pulses, prevents the
self−supply current source to restart and puts all the circuitry
in standby, consuming as little as 350 mA typical (I
parameter). As a result, the V
toward 0 V. When this level crosses 5.6 V typical, the
controller enters a new startup phase by turning the current
source on: V
output pulses at the VCC
condition has been removed before VCC
then the IC continues its normal operation. Otherwise, a new
fault cycle takes place. Figure 25 shows the evolution of the
signals in presence of a fault.
you first apply the power to the IC. The corresponding
transient fault duration due to the output capacitor charging
must be less than the time needed to discharge from 12.2 V
to 10 V, otherwise the supply will not properly start. The test
consists in either simulating or measuring in the lab how
much time the system takes to reach the regulation at full
load. Let’s suppose that this time corresponds to 6ms.
Therefore a V
appropriated in order to not trigger the overload detection
circuitry. If the corresponding IC consumption, including
CC
During the startup phase, the peak current is pushed to the
decreases from the VCC
Fault is
Relaxed
Pulses
Driver
CC
CC
rises toward 12.2 V and again delivers
CC
fall time of 10 ms could be well
decoupling capacitor: as soon as the
Time
Time
Time
OFF
OFF
CC
crossing point. If the fault
level (typically 12.2 V) the
level slowly discharges
ON
approaches,
ON
level is
CC3