NCP4303B ON Semiconductor, NCP4303B Datasheet - Page 20

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NCP4303B

Manufacturer Part Number
NCP4303B
Description
Secondary Side Synchronous Rectification Driver
Manufacturer
ON Semiconductor
Datasheet

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converter with the NCP4303 driver can be seen in Figure 46.
In this application the trigger signal is taken directly from the
flyback controller driver output and transmitted to the
secondary side by pulse transformer TR2. Because the
trigger input is rising edge sensitive, it is not necessary to
transmit the entire primary driver pulse to the secondary.
The coupling capacitor C5 is used to allow pulse transformer
core reset and also to prepare a needle pulse (a pulse with
width lower than 100 ns) to be transmitted to the NCP4303
trigger input. The advantage of needle trigger pulse usage is
that the required volt−second product of the pulse
transformer is very low and that allows the designer to use
very small and cheap magnetics. The trigger transformer can
be for instance prepared on a small toroidal ferrite core with
diameter of 8 mm. Proper safety insulation between primary
Minimum T
time periods that ease the implementation of the
synchronous rectification system in a power supply. These
A typical application schematic of a CCM flyback
The NCP4303 offers adjustable minimum ON and OFF
on
Figure 46. Typical Application Schematic When NCP4303 is Used in CCM Flyback Converter
and T
off
Adjustment
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NCP4303A/B
20
and secondary sides can be easily assured by using triple
insulated wire for one or even both windings.
by external circuitry consisting of transistors Q1, Q2 and
surrounding components. The primary MOSFET is thus
turned−on with a slight delay so that the secondary
controller turns−off the SR MOSFET by trigger signal prior
to the primary switching. This method reduces the
commutation losses and the SR MOSFET drain voltage
spike, which results in improved efficiency.
additional capacitor with safety insulation) between the
primary and secondary to transmit the trigger signal. We do
not recommend this technique as the parasitic capacitive
currents between primary and secondary may affect the
trigger signal and thus overall system functionality.
timers avoid false triggering on the CS input after the
MOSFET is turned on or off. The adjustment is based on an
internal timing capacitance and external resistors connected
to the GND pin – refer to Figure 47 for better understanding.
The primary MOSFET gate voltage rising edge is delayed
It is also possible to use capacitive coupling (use
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