NCP5210 ON Semiconductor, NCP5210 Datasheet - Page 11

• Manufacturer Part Number: NCP5210
• Description: PWM Dual Buck and Linear DDR Power Controller
• Manufacturer: ON Semiconductor

used to eliminate the conduction loss contributed by the
forward voltage of a diode or Schottky diode rectifier.
Adaptive non−overlap timing control of the complementary
gate drive output signals is provided to reduce
shoot−through current that degrades efficiency.
Tolerance of VDDQ
resistor divider R1/R2 impact the precision of VDDQ. With
the control loop in regulation, VDDQ = VFBQ
R1/R2). With a worst case (for all valid operating
conditions) VFBQ tolerance of 1.5%, a worst case range of
specified as 1.100 1%.
Fault Protection of VDDQ Regulator
sets the current limit for the high−side switch. The voltage
VOCP pin is compared to the voltage at SWDDQ pin when
the high−side gate drive is turned on after a fixed period of
blanking time to avoid false current limit triggering. When
the voltage at SWDDQ is lower than VOCP, an overcurrent
condition occurs and all regulators are latched off to protect
against overcurrent. The IC can be powered up again if one
of the supply voltages, 5VDUAL or 12VATX, is recycled.
The main purpose is for fault protection but not to be for an
precise current limit.
disabled.
Feedback Compensation of VDDQ Regulator
VTT Active Terminator
with two internal N−Ch FETs to provide current sink and
source capability up to 2.0 A. It is activated only when the
DDQ regulator is in regulation in S0 mode. It draws power
from VDDQ with the internal gate drive power derived from
5VDUAL. While VTT output is connecting to the FBVTT
pin directly, VTT voltage is designed to automatically track
2% for VDDQ will be assured if the ratio R1/R2 is
For enhanced efficiency, an active synchronous switch is
Both the tolerance of VFBQ and the ratio of the external
In S0 mode, an internal voltage (VOCP) = 5VDUAL – 0.8
In S3 mode, this overcurrent protection feature is
The compensation network is shown in Figure 2.
The VTT active terminator is a 2 quadrant linear regulator
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NCP5210
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at the half of DDQ_REF. This regulator is stable with any
value of output capacitor greater than 470 mF, and is
insensitive to ESR ranging from 1−mW to 400 mW.
Fault Protection of VTT Active Terminator
current limit preset at 2.4 A magnitude is implemented. The
VTT current limit provides a soft−start function during
startup.
MCH Switching Regulator
regulator except the output is 10 A, no fault protection is
implemented and the soft−start timing is twice as fast with
respect to CSS.
BOOT Pin Supply Voltage
between SWDDQ and BOOT pins. In S0 mode, 12VATX is
tied to BOOT pin through a Schottky diode as well. A 13−V
Zener clamp circuit must clamp this boot strapping voltage
produced by the flying capacitor in S0 mode.
voltage is created by the Schottky diode between 5VDUAL
and BOOT pins as well as the flying capacitor. The
BOOT_UVLO works specially. The _BOOTGD goes low
and the IC remains in S3 mode.
Thermal Consideration
allowed dissipated power of QFN−20 is 2.8 W, which is
enough to handle the internal power dissipation in S0 mode.
To take full advantage of the thermal capability of this
package, the exposed pad underneath must be soldered
directly onto a PCB metal substrate to allow good
thermal contact.
Thermal Shutdown
entire IC is shutdown, until the junction temperature drops
below 120 C. Below which, the chip resumes normal
operation.
To provide protection for the internal FETs, bi−directional
The secondary switching regulator is identical to the DDQ
In typical application, a flying capacitor is connected
In S3 mode the 12VATX is collapsed and the BOOT
Assuming an ambient temperature of 50 C, the maximum
When the chip junction temperature exceeds 145 C, the