74ACT533 Fairchild Semiconductor, 74ACT533 Datasheet

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74ACT533

Manufacturer Part Number
74ACT533
Description
Octal Transparent Latch with 3-STATE Outputs
Manufacturer
Fairchild Semiconductor
Datasheet
© 1999 Fairchild Semiconductor Corporation
74ACT533SC
74ACT533MTC
74ACT533PC
74ACT533
Octal Transparent Latch
with 3-STATE Outputs
General Description
The ACT533 consists of eight latches with 3-STATE out-
puts for bus organized system applications. The flip-flops
appear transparent to the data when Latch Enable (LE) is
HIGH. When LE is low, the data satisfying the input timing
requirements is latched. Data appears on the bus when the
Output Enable (OE) is LOW. When OE is HIGH, the bus
output is in the high impedance state.
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code
Logic Symbols
FACT
Order Number
is a trademark of Fairchild Semiconductor Corporation.
Package Number
MTC20
IEEE/IEC
M20B
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
DS500311
Features
Connection Diagram
Pin Descriptions
I
Eight latches in a single package
3-STATE outputs drive bus lines or buffer memory
address registers
Outputs source/sink 24 mA
Inverted version of the ACT373
TTL-compatible inputs
CC
and I
Package Description
D
LE
OE
O
Pin Names
OZ
0
0
–D
–O
reduced by 50%
7
7
Data Inputs
Latch Enable Input
Output Enable Input
3-STATE Latch Outputs
August 1999
Revised October 1999
Description
www.fairchildsemi.com

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74ACT533 Summary of contents

Page 1

... MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT533PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code ...

Page 2

Functional Description The ACT533 contains eight D-type latches with 3-STATE standard outputs. When the Latch Enable (LE) input is HIGH, data on the D inputs enters the latches. In this con- n dition the latches are transparent, i.e., a latch ...

Page 3

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current ( ...

Page 4

AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL PLH Propagation Delay PHL PLH Output Enable Time PZL PZH Output Disable Time ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit, JEDEC MS-013, 0.300” Wide Body Package Number M20B 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide www.fairchildsemi.com Package Number MTC20 6 ...

Page 7

Physical Dimensions Physical Dimensions inches (millimeters) unless otherwise noted (Continued) inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package, JEDEC MS-001, 0.300” Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses ...

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