74ACTQ843 Fairchild Semiconductor, 74ACTQ843 Datasheet - Page 2

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74ACTQ843

Manufacturer Part Number
74ACTQ843
Description
Quiet Seriesa 9-Bit Transparent Latch with 3-STATE Outputs
Manufacturer
Fairchild Semiconductor
Datasheet
www.fairchildsemi.com
Functional Description
The ACTQ843 consists of nine D-type latches with 3-
STATE outputs. The flip-flops appear transparent to the
data when Latch Enable (LE) is HIGH. This allows asyn-
chronous operation, as the output transition follows the
data in transition. On the LE HIGH-to-LOW transition, the
data that meets the setup times is latched. Data appears
on the bus when the Output Enable (OE) is LOW. When
OE is HIGH, the bus output is in the high impedance state.
Function Table
H
L
X
Z
NC
Logic Diagram
LOW Voltage Level
High Impedance
HIGH Voltage Level
Immaterial
No Change
CLR PRE
H
H
H
H
H
H
H
H
L
L
L
H
H
H
H
H
H
H
H
L
L
L
Inputs
OE
H
H
H
H
H
L
L
L
L
L
L
LE
H
H
H
H
X
X
X
L
L
L
L
H
X
H
X
X
X
X
X
X
D
L
L
Internal
2
NC
NC
H
H
H
H
H
L
L
L
L
In addition to the LE and OE pins, the ACTQ843 has a
Clear (CLR) pin and a Preset (PRE) pin. These pins are
ideal for parity bus interfacing in high performance sys-
tems. When CLR is LOW, the outputs are LOW if OE is
LOW. When CLR is HIGH, data can be entered into the
latch. When PRE is LOW, the outputs are HIGH if OE is
LOW. Preset overrides CLR.
Q
Outputs
NC
H
H
H
O
Z
Z
Z
L
L
Z
Z
High Z
High Z
Latched
Transparent
Transparent
Latched
Preset
Clear
Preset
Clear/High Z
Preset/High Z
Function

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