MC10EL32DTR2 ON Semiconductor, MC10EL32DTR2 Datasheet - Page 2

• Manufacturer Part Number: MC10EL32DTR2
• Description: IC DIVIDER DIV X2 5V ECL 8-TSSOP
• Manufacturer: ON Semiconductor
• Series: 10ELr

Specifications of MC10EL32DTR2

• Logic Type: Divide-by-2
• Direction: Up
• Number Of Elements: 1
• Number Of Bits Per Element: 1
• Reset: Asynchronous
• Count Rate: 3GHz
• Trigger Type: Positive, Negative
• Voltage - Supply: 4.2 V ~ 5.7 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Timing: -

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)
Table 2. MAXIMUM RATINGS
V
V
V
I
I
T
T
q
q
q
q
T
q
T
q
Symbol
out
BB
A
stg
JA
JC
JA
JC
sol
JA
sol
JC
CC
EE
I
Figure 1. Logic Diagram and Pinout Assignment
Reset
V
CLK
CLK
BB
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
V
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Wave Solder
Thermal Resistance (Junction−to−Ambient)
Wave Solder
Thermal Resistance (Junction−to−Case)
BB
1
2
3
4
Sink/Source
Parameter
÷2
R
8
7
6
5
Pb−Free
V
Q
Q
V
CC
EE
Pb
http://onsemi.com
V
V
V
V
Continuous
Surge
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
Standard Board
<2 to 3 sec @ 248°C
0 lfpm
500 lfpm
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
(Note 1)
EE
CC
EE
CC
Condition 1
= 0 V
= 0 V
= 0 V
= 0 V
2
Table 1. PIN DESCRIPTION
*Pins will default low when left open.
CLK, CLK
Reset
Q, Q
V
V
V
EP
BB
CC
EE
PIN
V
V
SOIC−8
SOIC−8
SOIC−8
TSSOP−8
TSSOP−8
TSSOP−8
DFN8
DFN8
DFN8
I
I
 V
 V
Condition 2
ECL Clock Inputs*
ECL Asynch Reset*
ECL Data Outputs
Reference Voltage Output
Positive Supply
Negative Supply
(DFN8 only) Thermal exposed pad must be con-
nected to a sufficient thermal conduit. Electric-
ally connect to the most negative supply (GND)
or leave unconnected, floating open.
CC
EE
FUNCTION
41 to 44 ± 5%
−65 to +150
−40 to +85
41 to 44
35 to 40
Rating
± 0.5
100
190
130
185
140
265
129
265
265
−8
−6
50
84
8
6
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
mA
mA
mA
°C
°C
°C
°C
V
V
V
V