LM4842 National Semiconductor, LM4842 Datasheet - Page 18

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LM4842

Manufacturer Part Number
LM4842
Description
Stereo 2W Amplifiers with DC Volume Control Transient Free Outputs/ and Cap-less Headphone Drive
Manufacturer
National Semiconductor
Datasheet

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LM4842LQ
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Application Information
mal design. Failing to optimize thermal design may compro-
mise the LM4842’s high power performance and activate
unwanted, though necessary, thermal shutdown protection.
The MH and LQ packages must have their exposed DAPs
soldered to a grounded copper pad on the PCB. The DAP’s
PCB copper pad is connected to a large grounded plane of
continuous unbroken copper. This plane forms a thermal
mass heat sink and radiation area. Place the heat sink area
on either outside plane in the case of a two-sided PCB, or on
an inner layer of a board with more than two layers. Connect
the DAP copper pad to the inner layer or backside copper
heat sink area with 32(4x8) MH or 6(3x2) LQ vias. The via
diameter should be 0.012in–0.013in with a 1.27mm pitch.
Ensure efficient thermal conductivity by plating-through and
solder-filling the vias.
Best thermal performance is achieved with the largest prac-
tical copper heat sink area. If the heatsink and amplifier
share the same PCB layer, a nominal 2.5in
necessary for 5V operation with a 4Ω load. Heatsink areas
not placed on the same PCB layer as the LM4842MH and
LQ packages should be 5in
voltage and load resistance. The last two area recommen-
dations apply for 25˚C ambient temperature. Increase the
area to compensate for ambient temperatures above 25˚C.
The junction temperature must be held below 150˚C to pre-
vent activating the LM4842’s thermal shutdown protection.
The LM4842’s power de-rating curve in the Typical Perfor-
mance Characteristics shows the maximum power dissipa-
tion versus temperature. Example PCB layouts for the
exposed-DAP TSSOP and LQ packages are shown in the
Demonstration Board Layout section. Further detailed and
specific information concerning PCB layout and fabrication is
available in National Semiconductor’s AN1187.
PCB LAYOUT AND SUPPLY REGULATION
CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω LOADS
Power dissipated by a load is a function of the voltage swing
across the load and the load’s impedance. As load imped-
ance decreases, load dissipation becomes increasingly de-
pendent on the interconnect (PCB trace and wire) resistance
between the amplifier output pins and the load’s connec-
tions. Residual trace resistance causes a voltage drop,
which results in power dissipated in the trace and not in the
load as desired. For example, 0.1Ω trace resistance reduces
the output power dissipated by a 4Ω load from 2.1W to 2.0W.
This problem of decreased load dissipation is exacerbated
as load impedance decreases. Therefore, to maintain the
highest load dissipation and widest output voltage swing,
PCB traces that connect the output pins to a load must be as
wide as possible.
Poor power supply regulation adversely affects maximum
output power. A poorly regulated supply’s output voltage
decreases with increasing load current. Reduced supply
voltage causes decreased headroom, output signal clipping,
and reduced output power. Even with tightly regulated sup-
plies, trace resistance creates the same effects as poor
supply regulation. Therefore, making the power supply
traces as wide as possible helps maintain full output voltage
swing.
2
(min) for the same supply
(Continued)
2
(min) area is
18
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4842 output stage consists of
two pairs of operational amplifiers, forming a two-channel
(channel A and channel B) stereo amplifier. (Though the
following discusses channel A, it applies equally to channel
B.)
Figure 1 shows that the first amplifier’s negative (-) output
serves as the second amplifier’s input. This results in both
amplifiers producing signals identical in magnitude, but 180˚
out of phase. Taking advantage of this phase difference, a
load is placed between −OUTA and +OUTA and driven dif-
ferentially (commonly referred to as “bridge mode”). This
results in a differential gain of
Bridge mode amplifiers are different from single-ended am-
plifiers that drive loads connected between a single amplifi-
er’s output and ground. For a given supply voltage, bridge
mode has a distinct advantage over the single-ended con-
figuration: its differential output doubles the voltage
swing across the load. This produces four times the output
power when compared to a single-ended amplifier under the
same conditions. This increase in attainable output power
assumes that the amplifier is not current limited or that the
output signal is not clipped. To ensure minimum output sig-
nal clipping when choosing an amplifier’s closed-loop gain,
refer to the Audio Power Amplifier Design section.
Another advantage of the differential bridge output is no net
DC voltage across the load. This is accomplished by biasing
channel A’s and channel B’s outputs at half-supply. This
eliminates the coupling capacitor that single supply, single-
ended amplifiers require. Eliminating an output coupling ca-
pacitor in a single-ended configuration forces a single-supply
amplifier’s half-supply bias voltage across the load. This
increases internal IC power dissipation and may perma-
nently damage loads such as speakers.
POWER DISSIPATION
Power dissipation is a major concern when designing a
successful single-ended or bridged amplifier. Equation (2)
states the maximum power dissipation point for a single-
ended amplifier operating at a given supply voltage and
driving a specified output load.
However, a direct consequence of the increased power de-
livered to the load by a bridge amplifier is higher internal
power dissipation for the same conditions.
The LM4842 has two operational amplifiers per channel. The
maximum internal power dissipation per channel operating in
the bridge mode is four times that of a single-ended ampli-
fier. From Equation (3), assuming a 5V power supply and a
4Ω load, the maximum single channel power dissipation is
1.27W or 2.54W for stereo operation.
The LM4842’s power dissipation is twice (2 channels) that
given by Equation (2) or Equation (3) when operating in the
single-ended mode or bridge mode, respectively. Twice the
P
P
DMAX
DMAX
= 4
= (V
*
A
DD
(V
VD
DD
)
2
= 2
/(2π
)
2
/(2π
2
*
R
(R
2
L
R
) Single-Ended
f
/R
L
) Bridge Mode
i
)
(1)
(2)
(3)

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