MC74HC4051 ON Semiconductor, MC74HC4051 Datasheet - Page 11

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MC74HC4051

Manufacturer Part Number
MC74HC4051
Description
(MC74HC4051 - MC74HC4053) Analog Multiplexers/Demultiplexers
Manufacturer
ON Semiconductor
Datasheet

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V
high and GND being recognized as a logic low. In this exam-
ple:
the supply voltages V
voltage should not exceed V
analog voltage should not go below V
difference between V
using the configuration of Figure 15, a maximum analog sig-
nal of ten volts peak–to–peak can be controlled. Unused
analog inputs/outputs may be left floating (i.e., not con-
nected). However, tying unused analog inputs and outputs to
CC
The Channel Select and Enable control pins should be at
The maximum analog voltage swings are determined by
Figure 14a. Total Harmonic Distortion, Test Set–Up
or GND logic levels. V
Figure 12. Crosstalk Between Any Two
*Includes all probe and jig capacitance
V
GND = 0V = logic low
CC
Switches, Test Set–Up
CC
*Includes all probe and jig capacitance
CC
= +5V = logic high
and V
and V
CC
CC
EE
. Similarly, the negative peak
being recognized as a logic
EE
. The positive peak analog
is ten volts. Therefore,
EE
. In this example, the
APPLICATIONS INFORMATION
V
crosstalk and feedthrough noise that may be picked up by an
unused switch.
ment. The only constraints on the power supplies are that:
anticipated on the analog channels, external Germanium or
Schottky diodes (D
16. These diodes should be able to absorb the maximum
anticipated current surges during clipping.
CC
Although used here, balanced supplies are not a require-
When voltage transients above V
or GND through a low value resistor helps minimize
Figure 13. Power Dissipation Capacitance,
Figure 14b. Plot, Harmonic Distortion
V
V
V
EE
CC
CC
x
) are recommended as shown in Figure
– GND = 0 to –6 volts
– V
– GND = 2 to 6 volts
and V
Test Set–Up
EE
EE
= 2 to 12 volts
GND
CC
and/or below V
EE
are

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