LMX3162 National Semiconductor, LMX3162 Datasheet - Page 17

• Manufacturer Part Number: LMX3162
• Description: Single Chip Radio Transceiver
• Manufacturer: National Semiconductor

Loop Filter Design Consideration
Loop Gain Equations
A linear control system model of the phase feedback for a
PLL in the locked state is shown in Figure 2 . The open loop
gain is the product of the phase comparator gain (K
VCO gain (K
gain of the feedback counter modulus (N). The passive loop
filter configuration used is displayed in Figure 3 , while the
complex impedance of the filter is given in Equation (2) .
vco
FIGURE 3. Passive Loop Filter
FIGURE 2. PLL Linear Model
/s), and the loop filter gain Z(s) divided by the
DS100929-10
FIGURE 1. Conventional PLL Architecture
DS100929-9
), the
17
PASSIVE LOOP FILTER
The time constants which determine the pole and zero fre-
quencies of the filter transfer function can be defined as
and
The 3rd order PLL Open Loop Gain can be calculated in
terms of frequency,
and the design constants K , K
From Equations (3), (4) we can see that the phase term will
be dependent on the single pole and zero such that the
phase margin is determined in Equation (6) .
( ) = tan
Open loop gain = H(s) G(s) =
−1
i/ e = K Z(s)K
(
, the filter time constants T1 and T2,
T2 = R2 • C2
• T 2) − tan
vco
, and N.
VCO
−1
(
/Ns
• T 1) + 180˚
www.national.com
DS100929-8
(1)
(2)
(3)
(4)
(5)
(6)