LMX3305 National Semiconductor, LMX3305 Datasheet - Page 16
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LMX3305
Manufacturer Part Number
LMX3305
Description
Triple Phase Locked Loop for RF Personal Communications
Manufacturer
National Semiconductor
Datasheet
1.LMX3305.pdf
(24 pages)
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Divide ratio is from 3 to 1023 (Divide ratios less than 3 are prohibited)
Tx_NB_CNTR
N = PB + A
B = N div P
A = N mod P
2.0 Programming Description
2.4.1 3-Bit IF Swallow Counter Divide Ratio (Tx A Counter, Rx A Counter)
2.4.2 10-Bit IF Programmable Counter Divide Ratio (Tx B Counter, Rx B Counter)
2.4.3 Tx_PWDN (IF_N[15])
This bit will asynchronously powerdown the Tx PLL when set to one. For normal operation, it should be set to zero.
2.4.4 Rx_PWDN (IF_N[1])
This bit will asynchronously powerdown the Rx PLL when set to one. For normal operation, it should be set to zero.
Divide Ratio
1023
3
4
•
Tx_NA_CNTR and Rx_NB_CNTR
0
0
1
•
Divide ratio is from 0 to 7
Tx_NB_CNTR
Divide Ratio
0
1
7
•
0
0
1
•
Tx_NA_CNTR and Rx_NB_CNTR
Rx_NA_CNTR
0
0
1
•
(Continued)
Tx_NA_CNTR [2:0] or Rx_NA_CNTR [2:0]
Tx_NB_CNTR [9:0] or Rx_NB_CNTR [9:0]
0
0
1
•
0
0
1
•
16
Rx_NA_CNTR
0
0
1
•
0
0
1
•
0
0
1
•
0
0
1
•
0
1
1
•
0
1
1
•
1
0
1
•
1
0
1
•