HT45R06 Holtek Semiconductor, HT45R06 Datasheet - Page 12

• Manufacturer Part Number: HT45R06
• Description: A/D Type 8-Bit OTP MCU
• Manufacturer: Holtek Semiconductor

Power Down Operation - HALT
The HALT mode is initialized by the HALT instruction
and results in the following:
The system can leave the HALT mode by means of an
external reset, an interrupt, an external falling edge sig-
nal on port A or a WDT overflow. An external reset
causes a device initialization and the WDT overflow per-
forms a warm reset . After the TO and PDF flags are
examined, the cause for a chip reset can be determined.
The PDF flag is cleared by a system power-up or exe-
cuting the CLR WDT instruction and is set when exe-
cuting the HALT instruction. The TO flag is set if the
WDT time-out occurs, and causes a wake-up that only
resets the Program Counter and SP, the other circuits
maintain their original status.
The port A wake-up and interrupt methods can be con-
sidered as a continuation of normal execution. Each bit
in port A can be independently selected to wake up the
device by the options. Awakening from an I/O port stim-
ulus, the program will resume execution of the next in-
struction. If it awakens from an interrupt, two sequences
may occur. If the related interrupt is disabled or the inter-
rupt is enabled but the stack is full, the program will re-
sume execution at the next instruction. If the interrupt is
enabled and the stack is not full, a regular interrupt re-
sponse takes place. If an interrupt request flag is set to
tion of the related interrupt will be disabled. Once a
wake-up event occurs, it takes 2.5ms (system clock pe-
riod) to resume normal operation. In other words, a
dummy period will be inserted after wake-up. If the
wake-up results from an interrupt acknowledge, the ac-
tual interrupt subroutine execution will be delayed by
one or more cycles. If the wake-up results in the next in-
struction execution, this will be executed immediately
after the dummy period is finished.
To minimize power consumption, all the I/O pins should
be carefully managed before entering the HALT status.
Reset
There are three ways in which a reset can occur:
Rev. 1.00
1 before entering the HALT mode, the wake-up func-
The system oscillator will be turned off but the WDT
oscillator keeps running (if the WDT oscillator is se-
lected).
The contents of the on-chip RAM and registers remain
unchanged.
WDT and WDT prescaler will be cleared and re-
counted again (if the WDT clock is from the WDT os-
cillator).
AlloftheI/Oportsmaintaintheiroriginalstatus.
The PDF flag is set and the TO flag is cleared.
RES reset during normal operation
RES reset during HALT
WDT time-out reset during normal operation
12
Note:
The WDT time-out during HALT is different from other
chip reset conditions, since it can perform a warm re -
set that resets only the Program Counter and SP, leav-
ing the other circuits in their original state. Some regis-
ters remain unchanged during other reset conditions.
Most registers are reset to the initial condition when
the reset conditions are met. By examining the PDF and
TO flags, the program can distinguish between different
Note: u means unchanged
chip resets .
TO
0
u
0
1
1
nected to the RES pin as short as possible, to
avoid noise interference.
PDF
* Make the length of the wiring, which is con-
0
u
1
u
1
RES reset during power-up
RES reset during normal operation
RES wake-up HALT
WDT time-out during normal operation
WDT wake-up HALT
Reset Configuration
Reset Timing Chart
Reset Circuit
RESET Conditions
HT45R06
May 24, 2005